linux-kernel - Re: [PATCH] arm64: dts: qcom: sc7280.dtsi: Fix PMU nodes for Cortex A55 and A78

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Message-ID: <CAA8EJpopMPSBmxJHbatfF+fNoSWipbepyj+7qJRG23WYOCCWzg@mail.gmail.com>
Date: Fri, 30 Aug 2024 11:54:19 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Stephan Gerhold <stephan.gerhold@...aro.org>
Cc: Danila Tikhonov <danila@...xyga.com>, andersson@...nel.org, konradybcio@...nel.org, 
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	cros-qcom-dts-watchers@...omium.org, linux-arm-msm@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux@...nlining.org
Subject: Re: [PATCH] arm64: dts: qcom: sc7280.dtsi: Fix PMU nodes for Cortex
 A55 and A78

On Fri, 30 Aug 2024 at 11:26, Stephan Gerhold
<stephan.gerhold@...aro.org> wrote:
>
> On Fri, Aug 30, 2024 at 11:13:28AM +0300, Dmitry Baryshkov wrote:
> > On Sun, Aug 18, 2024 at 10:29:05PM GMT, Danila Tikhonov wrote:
> > > The SC7280, SM7325, and QCM6490 platforms feature an 8-core setup
> > > consisting of:
> > > - 1x Kryo 670 Prime (Cortex-A78) / Kryo 670 Gold Plus (Cortex-A78)
> > > - 3x Kryo 670 Gold (Cortex-A78)
> > > - 4x Kryo 670 Silver (Cortex-A55)
> > > (The CPU cores in the SC7280 are simply called Kryo, but are
> > > nevertheless based on the same Cortex A78 and A55).
> > >
> > > Use the correct compatibility.
> > >
> > > Signed-off-by: Danila Tikhonov <danila@...xyga.com>
> > > ---
> > >  arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++--
> > >  1 file changed, 7 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > index 91cc5e74d8f5..ab024a3c3653 100644
> > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > @@ -845,8 +845,13 @@ wlan_smp2p_in: wlan-wpss-to-ap {
> > >             };
> > >     };
> > >
> > > -   pmu {
> > > -           compatible = "arm,armv8-pmuv3";
> > > +   pmu-a55 {
> > > +           compatible = "arm,cortex-a55-pmu";
> > > +           interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> > > +   };
> > > +
> > > +   pmu-a78 {
> > > +           compatible = "arm,cortex-a78-pmu";
> > >             interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> >
> > Shouldn't these two entries have GIC_CPU_MASK_RAW(), limiting interrupts
> > to the corresponding cores? I see that in [1] Rob used masks for older
> > SoCs, but skipped them for newer ones.
> >
> > [1] https://lore.kernel.org/all/20240417204247.3216703-1-robh@kernel.org/
> >
>
> According to the bindings, the cpu mask bits apply only to gic-v2, but
> not gic-v3. It looks correct in Rob's changes. And here too, since
> SC7280 uses gic-v3.

Ack, thanks for the clarification.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>


-- 
With best wishes
Dmitry