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Message-ID: <IA1PR20MB4953FF3C0CA0B51962DBE892BB972@IA1PR20MB4953.namprd20.prod.outlook.com> Date: Fri, 30 Aug 2024 16:57:38 +0800 From: Inochi Amaoto <inochiama@...look.com> To: Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Conor Dooley <conor.dooley@...rochip.com>, Guo Ren <guoren@...nel.org>, Inochi Amaoto <inochiama@...look.com>, Emil Renner Berthing <emil.renner.berthing@...onical.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, Sunil V L <sunilvl@...tanamicro.com>, Anup Patel <apatel@...tanamicro.com>, Hal Feng <hal.feng@...rfivetech.com> Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: [PATCH] riscv: defconfig: Enable pinctrl support for CV18XX Series SoC Enable pinctrl driver for the whole CV18XX series. Signed-off-by: Inochi Amaoto <inochiama@...look.com> --- arch/riscv/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 0d678325444f..cd7980df4759 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -167,6 +167,10 @@ CONFIG_SPI_RSPI=m CONFIG_SPI_SIFIVE=y CONFIG_SPI_SUN6I=y # CONFIG_PTP_1588_CLOCK is not set +CONFIG_PINCTRL_SOPHGO_CV1800B=y +CONFIG_PINCTRL_SOPHGO_CV1812H=y +CONFIG_PINCTRL_SOPHGO_SG2000=y +CONFIG_PINCTRL_SOPHGO_SG2002=y CONFIG_GPIO_SIFIVE=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_SENSORS_SFCTEMP=m -- 2.46.0
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