lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <095f5048-5c39-438d-b5a9-7519199a8e9f@kernel.org>
Date: Fri, 30 Aug 2024 11:51:20 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Nikunj Kela <quic_nkela@...cinc.com>, andersson@...nel.org,
 konradybcio@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, rafael@...nel.org, viresh.kumar@...aro.org,
 herbert@...dor.apana.org.au, davem@...emloft.net, sudeep.holla@....com,
 andi.shyti@...nel.org, tglx@...utronix.de, will@...nel.org, joro@...tes.org,
 jassisinghbrar@...il.com, lee@...nel.org, linus.walleij@...aro.org,
 amitk@...nel.org, thara.gopinath@...il.com, broonie@...nel.org,
 wim@...ux-watchdog.org, linux@...ck-us.net
Cc: robin.murphy@....com, cristian.marussi@....com, rui.zhang@...el.com,
 lukasz.luba@....com, vkoul@...nel.org, quic_gurus@...cinc.com,
 agross@...nel.org, bartosz.golaszewski@...aro.org, quic_rjendra@...cinc.com,
 robimarko@...il.com, linux-arm-msm@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-pm@...r.kernel.org, linux-crypto@...r.kernel.org,
 arm-scmi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-i2c@...r.kernel.org, iommu@...ts.linux.dev,
 linux-gpio@...r.kernel.org, linux-serial@...r.kernel.org,
 linux-spi@...r.kernel.org, linux-watchdog@...r.kernel.org,
 kernel@...cinc.com, quic_psodagud@...cinc.com, quic_tsoni@...cinc.com,
 quic_shazhuss@...cinc.com
Subject: Re: [PATCH 22/22] arm64: dts: qcom: Add reduced functional DT for
 SA8255p Ride platform

On 29/08/2024 21:06, Nikunj Kela wrote:
> 
> On 8/29/2024 12:49 AM, Krzysztof Kozlowski wrote:
>> On 28/08/2024 22:37, Nikunj Kela wrote:
>>> SA8255p Ride platform is an automotive virtual platform. This platform
>>> abstracts resources such as clocks, regulators etc. in the firmware VM.
>>> The device drivers request resources operations over SCMI using power,
>>> performance, reset and sensor protocols.
>>>
>>> Multiple virtual SCMI instances are being employed for greater parallelism.
>>> These instances are tied to devices such that devices can have dedicated
>>> SCMI channel. Firmware VM (runs SCMI platform stack) is SMP enabled and
>>> can process requests from agents in parallel. Qualcomm smc transport is
>>> used for communication between SCMI agent and platform.
>>>
>>> Let's add the reduced functional support for SA8255p Ride board.
>>> Subsequently, the support for PCIe, USB, UFS, Ethernet will be added.
>>>
>>> Co-developed-by: Shazad Hussain <quic_shazhuss@...cinc.com>
>>> Signed-off-by: Shazad Hussain <quic_shazhuss@...cinc.com>
>>> Signed-off-by: Nikunj Kela <quic_nkela@...cinc.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/Makefile           |    1 +
>>>  arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi |   80 +
>>>  arch/arm64/boot/dts/qcom/sa8255p-ride.dts   |  149 ++
>>>  arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi  | 2312 ++++++++++++++++++
>>>  arch/arm64/boot/dts/qcom/sa8255p.dtsi       | 2405 +++++++++++++++++++
>>>  5 files changed, 4947 insertions(+)
>>>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi
>>>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-ride.dts
>>>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi
>>>  create mode 100644 arch/arm64/boot/dts/qcom/sa8255p.dtsi
>>>
>> ...
>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8255p-ride.dts b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
>>> new file mode 100644
>>> index 000000000000..1dc03051ad92
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
>>> @@ -0,0 +1,149 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include <dt-bindings/gpio/gpio.h>
>>> +
>>> +#include "sa8255p.dtsi"
>>> +#include "sa8255p-pmics.dtsi"
>>> +#include "sa8255p-scmi.dtsi"
>>> +
>>> +/ {
>>> +	model = "Qualcomm Technologies, Inc. SA8255P Ride";
>>> +	compatible = "qcom,sa8255p-ride", "qcom,sa8255p";
>>> +
>>> +	aliases {
>>> +		i2c11 = &i2c11;
>>> +		i2c18 = &i2c18;
>>> +		serial0 = &uart10;
>>> +		serial1 = &uart4;
>>> +		spi16 = &spi16;
>>> +		scmichannels = &scmichannels;
>> Nothing parses this.
>>
> We are using this alias in bootloader to speed up the parsing. Since we

Then please provide link to the bindings in this open-source upstream
bootloader.

Otherwise it is a clear no-go for me. We don't add properties because
some downstream wants them. Imagine what would happen if we opened that
can of worms...

> are using 64 SCMI instances and SCMI smc transport driver for
> Qualcomm(drivers/firmware/arm_scmi/transports/smc.c) expects
> cap-id(created by hypervisor at boot time), our bootloader gets those
> cap-id for each channel and populate them. This alias is an optimization
> to save boottime as in automotive, boot KPIs are critical.

I will refrain about commenting on KPIs...



Best regards,
Krzysztof


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ