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Message-ID: <4lsua4cxpxlla4i5rn7zmw3tvkbxz664a7as6jqy6qceljlj4x@ssev4fvuqz36>
Date: Sat, 31 Aug 2024 08:45:06 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: devicetree@...r.kernel.org, Conor Dooley <conor.dooley@...rochip.com>,
cyril.jean@...rochip.com, valentina.fernandezalanis@...rochip.com,
nitin.deshpande@...rochip.com, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-kernel@...r.kernel.org
Subject: Re: [RFC v1] dt-bindings: add IP versioning document for Microchip
FPGAs
On Fri, Aug 30, 2024 at 05:00:40PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> This is a pretty rough document I conjured up in 5 minutes, to document
> my expectations for compatible strings for both our FPGA IP blocks and
> reference designs that we ship, a la the one that exists for SiFive IPs.
> There's been some internal conversations lately about this naming etc,
> so good to have something written down.
>
You can try to make it a schema. Take a peak at:
Documentation/devicetree/bindings/arm/qcom-soc.yaml
Best regards,
Krzysztof
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