linux-kernel - Re: [PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID:
 <IA1PR20MB495323339EFB06E194204904BB902@IA1PR20MB4953.namprd20.prod.outlook.com>
Date: Sat, 31 Aug 2024 20:49:22 +0800
From: Inochi Amaoto <inochiama@...look.com>
To: Thomas Bonnefille <thomas.bonnefille@...tlin.com>, 
	Jonathan Cameron <jic23@...nel.org>, Lars-Peter Clausen <lars@...afoo.de>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>, 
	Inochi Amaoto <inochiama@...look.com>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
	Miquèl Raynal <miquel.raynal@...tlin.com>, linux-iio@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for
 Sophgo CV1800B

On Thu, Aug 29, 2024 at 02:31:52PM GMT, Thomas Bonnefille wrote:
> Add SARADC node for the Successive Approximation Analog to
> Digital Converter used in Sophgo CV1800B SoC.
> This patch only adds the active domain controller.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..da1ac59e976f 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -133,6 +133,28 @@ portd: gpio-controller@0 {
>  			};
>  		};
>  
> +		saradc: adc@...0000 {
> +			compatible = "sophgo,cv1800b-saradc";
> +			reg = <0x030f0000 0x1000>;
> +			clocks = <&clk CLK_SARADC>;
> +			interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +

> +			channel@0 {
> +				reg = <0>;
> +			};
> +
> +			channel@1 {
> +				reg = <1>;
> +			};
> +
> +			channel@2 {
> +				reg = <2>;
> +			};

I think it may better to move channel definition to board file.

> +		};
> +
>  		i2c0: i2c@...0000 {
>  			compatible = "snps,designware-i2c";
>  			reg = <0x04000000 0x10000>;
> 
> -- 
> 2.46.0
>