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Message-ID: <20240901174752.GL235729@rocinante>
Date: Mon, 2 Sep 2024 02:47:52 +0900
From: Krzysztof WilczyĆski <kw@...ux.com>
To: manivannan.sadhasivam@...aro.org
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: Re: [PATCH v4 00/12] PCI: qcom: Enumerate endpoints based on Link up
event in 'global_irq' interrupt
Hello,
> This series adds support to enumerate the PCIe endpoint devices using the Qcom
> specific 'Link up' event in 'global' IRQ. Historically, Qcom PCIe RC controllers
> lacked standard hotplug support. So when an endpoint is attached to the SoC,
> users have to rescan the bus manually to enumerate the device. But this can be
> avoided by rescanning the bus upon receiving 'Link up' event.
>
> Qcom PCIe RC controllers are capable of generating the 'global' SPI interrupt
> to the host CPUs. The device driver can use this interrupt to identify events
> such as PCIe link specific events, safety events etc...
>
> One such event is the PCIe Link up event generated when an endpoint is detected
> on the bus and the Link is 'up'. This event can be used to enumerate the
> endpoint devices.
>
> So add support for capturing the PCIe Link up event using the 'global' interrupt
> in the driver. Once the Link up event is received, the bus underneath the host
> bridge is scanned to enumerate PCIe endpoint devices.
>
> This series also has some cleanups to the Qcom PCIe EP controller driver for
> interrupt handling.
>
> NOTE: During v2 review, there was a discussion about removing the devices when
> 'Link Down' event is received. But this needs some more investigation, so I'm
> planning to add it later.
>
> Testing
> =======
>
> This series is tested on Qcom SM8450 based development board that has 2 SoCs
> connected over PCIe.
>
> Merging Strategy
> ================
>
> I'm expecting the binding and PCI driver changes to go through PCI tree and DTS
> patches through Qcom tree.
Applied to controller/qcom, thank you!
[01/08] PCI: qcom-ep: Drop the redundant masking of global IRQ events
https://git.kernel.org/pci/pci/c/3858e8a5ea71
[02/08] PCI: qcom-ep: Reword the error message for receiving unknown global IRQ event
https://git.kernel.org/pci/pci/c/95bebcbd657c
[03/08] dt-bindings: PCI: pci-ep: Update Maintainers
https://git.kernel.org/pci/pci/c/99244b999dec
[04/08] dt-bindings: PCI: pci-ep: Document 'linux,pci-domain' property
https://git.kernel.org/pci/pci/c/ada94d00620a
[05/08] PCI: endpoint: Assign PCI domain number for endpoint controllers
https://git.kernel.org/pci/pci/c/0328947c5032
[06/08] PCI: qcom-ep: Modify 'global_irq' and 'perst_irq' IRQ device names
https://git.kernel.org/pci/pci/c/bba1251edf85
[07/08] dt-bindings: PCI: qcom,pcie-sm8450: Add 'global' interrupt
https://git.kernel.org/pci/pci/c/6efd853303a5
[08/08] PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt
https://git.kernel.org/pci/pci/c/4581403f6792
Krzysztof
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