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Message-ID: <dad2df65-4321-497d-bb39-e96ca3df9bf1@gmail.com>
Date: Mon, 2 Sep 2024 17:49:38 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Pin-yen Lin <treapking@...omium.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: "open list:ARM/Mediatek SoC support" <linux-kernel@...r.kernel.org>,
 "moderated list:ARM/Mediatek SoC support"
 <linux-mediatek@...ts.infradead.org>,
 "moderated list:ARM/Mediatek SoC support"
 <linux-arm-kernel@...ts.infradead.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>, Pi-Hsun Shih <pihsun@...omium.org>,
 Jitao Shi <jitao.shi@...iatek.com>, Fabien Parent <fparent@...libre.com>
Subject: Re: [RESEND PATCH v2 1/2] arm64: dts: mt8183: add dpi node to mt8183



On 19/08/2024 14:05, Pin-yen Lin wrote:
> From: Pi-Hsun Shih <pihsun@...omium.org>
> 
> Add dpi node to mt8183.
> 
> Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> Signed-off-by: Pi-Hsun Shih <pihsun@...omium.org>
> Signed-off-by: Fabien Parent <fparent@...libre.com>
> Signed-off-by: Pin-yen Lin <treapking@...omium.org>

Applied, thanks!

> ---
> 
> (no changes since v1)
> 
>   arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++++++++++
>   1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 267378fa46c0..266441e999f2 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -1836,6 +1836,17 @@ dsi0: dsi@...14000 {
>   			phy-names = "dphy";
>   		};
>   
> +		dpi0: dpi@...15000 {
> +			compatible = "mediatek,mt8183-dpi";
> +			reg = <0 0x14015000 0 0x1000>;
> +			interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>;
> +			power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
> +			clocks = <&mmsys CLK_MM_DPI_IF>,
> +				 <&mmsys CLK_MM_DPI_MM>,
> +				 <&apmixedsys CLK_APMIXED_TVDPLL>;
> +			clock-names = "pixel", "engine", "pll";
> +		};
> +
>   		mutex: mutex@...16000 {
>   			compatible = "mediatek,mt8183-disp-mutex";
>   			reg = <0 0x14016000 0 0x1000>;

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