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Message-ID: <20240903171743.GA255170@bhelgaas>
Date: Tue, 3 Sep 2024 12:17:43 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Krzysztof Wilczyński <kw@...ux.com>
Cc: Jim Quinlan <james.quinlan@...adcom.com>, linux-pci@...r.kernel.org,
	Nicolas Saenz Julienne <nsaenz@...nel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
	Cyril Brulebois <kibi@...ian.org>,
	Stanimir Varbanov <svarbanov@...e.de>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Krzysztof Kozlowski <krzk@...nel.org>,
	bcm-kernel-feedback-list@...adcom.com, jim2101024@...il.com,
	Florian Fainelli <florian.fainelli@...adcom.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" <linux-rpi-kernel@...ts.infradead.org>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>,
	open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 05/13] PCI: brcmstb: Use bridge reset if available

On Tue, Sep 03, 2024 at 11:46:13PM +0900, Krzysztof Wilczyński wrote:
> Hello,
> 
> [...]
> > > >  static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
> > > >  {
> > > > -     u32 tmp, mask =  RGR1_SW_INIT_1_INIT_GENERIC_MASK;
> > > > -     u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;
> > > > +     if (val)
> > > > +             reset_control_assert(pcie->bridge_reset);
> > > > +     else
> > > > +             reset_control_deassert(pcie->bridge_reset);
> > > >
> > > > -     tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> > > > -     tmp = (tmp & ~mask) | ((val << shift) & mask);
> > > > -     writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> > > > +     if (!pcie->bridge_reset) {
> > > > +             u32 tmp, mask =  RGR1_SW_INIT_1_INIT_GENERIC_MASK;
> > > > +             u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;
> > > > +
> > > > +             tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> > > > +             tmp = (tmp & ~mask) | ((val << shift) & mask);
> > > > +             writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> > > > +     }
> > >
> > > This pattern looks goofy:
> > >
> > >   reset_control_assert(pcie->bridge_reset);
> > >   if (!pcie->bridge_reset) {
> > >     ...
> > >
> > > If we're going to test pcie->bridge_reset at all, it should be first
> > > so it's obvious what's going on and the reader doesn't have to go
> > > verify that reset_control_assert() ignores and returns success for a
> > > NULL pointer:
> > >
> > >   if (pcie->bridge_reset) {
> > >     if (val)
> > >       reset_control_assert(pcie->bridge_reset);
> > >     else
> > >       reset_control_deassert(pcie->bridge_reset);
> > >
> > >     return;
> > >   }
> > >
> > >   u32 tmp, mask =  RGR1_SW_INIT_1_INIT_GENERIC_MASK;
> > >   ...
> > >
> > Will do.
> [...]
> 
> You will do what?  If you don't mind me asking.

Can you just do the rework on the branch, Krzysztof?  I think that
will be easier/quicker than having Jim repost the entire series.

Bjorn

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