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Message-ID: <1771b5f1-ee45-43b0-8d03-b6747a4dc1d8@amd.com>
Date: Wed, 4 Sep 2024 01:11:52 +0530
From: Shyam Sundar S K <Shyam-sundar.S-k@....com>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Cc: Guruvendra Punugupati <Guruvendra.Punugupati@....com>,
Krishnamoorthi M <krishnamoorthi.m@....com>, linux-i3c@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 0/6] Introduce initial AMD I3C HCI driver support
Hi Alexandre, Jarkko,
On 8/29/2024 14:47, Shyam Sundar S K wrote:
> The AMD SoC includes an I3C IP block as part of the Fusion Controller Hub
> (FCH). This series introduces the initial driver support to enable the I3C
> IP block on AMD's latest processors.
>
> Currently, the code is closely tied to dt-bindings. This initial set aims
> to decouple some of these bindings by adding the MIPI ID, allowing the
> current driver to support ACPI-enabled x86 systems.
>
> It was discovered that the AMD I3C controller has several hardware issues,
> including:
> - Non-functional DMA mode (defaulting to PIO mode)
> - Issues with Open-Drain (OD) and Push-Pull (PP) timing parameters
> - Command response buffer threshold values
>
> All of these issues have been addressed in this series.
>
> v5->v6:
> -------
> - Add Reviewed-by tag
> - Update to variable name from "pio_mode_support" to "mode_selector"
Can this series be applied as 6.12 material? (as it has the all the
tags now)
Thanks,
Shyam
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