linux-kernel - Re: [PATCH v3 01/12] dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB

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Message-ID: <CAMuHMdVUW7a-i-K8WoN3FwGaam+17ngr4Hp6agBzAG+9SermOQ@mail.gmail.com>
Date: Tue, 3 Sep 2024 09:23:09 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Biju Das <biju.das.jz@...renesas.com>
Cc: "Claudiu.Beznea" <claudiu.beznea@...on.dev>, 
	"mturquette@...libre.com" <mturquette@...libre.com>, "sboyd@...nel.org" <sboyd@...nel.org>, 
	"robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>, 
	"conor+dt@...nel.org" <conor+dt@...nel.org>, 
	"alexandre.belloni@...tlin.com" <alexandre.belloni@...tlin.com>, 
	"magnus.damm@...il.com" <magnus.damm@...il.com>, "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>, 
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>, 
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, 
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	"linux-rtc@...r.kernel.org" <linux-rtc@...r.kernel.org>, 
	"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, 
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH v3 01/12] dt-bindings: clock: renesas,r9a08g045-vbattb:
 Document VBATTB

Hi Biju,

On Tue, Sep 3, 2024 at 8:58 AM Biju Das <biju.das.jz@...renesas.com> wrote:
> > -----Original Message-----
> > From: Claudiu <claudiu.beznea@...on.dev>
> > Sent: Friday, August 30, 2024 2:02 PM
> > Subject: [PATCH v3 01/12] dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB
> >
> > From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >
> > The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC, the tamper detector and a small
> > general usage memory of 128B. Add documentation for it.
> >
> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>

> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml
> > +  power-domains:
> > +    maxItems: 1
>
> Not sure, you need to document "PD_VBATT" power domain
> as per Table 41.2, this LSI supports 3 power domains(PD_ISOVCC, PD_VCC, PD_VBATT)
>
> Power Mode PD_ISOVCC PD_VCC PD_VBATT
> ALL_ON      ON          ON    ON
> AWO         OFF         ON    ON
> VBATT       OFF         OFF   ON
> ALL_OFF     OFF         OFF   OFF
>
> PD_VBATT domain is the area where the RTC/backup register is located, works on battery power when the power of
> PD_VCC and PD_ISOVCC domain are turned off.

AFAIU, PD_VBATT cannot be controlled by the user, and is just on
if main or battery power is supplied. So I don't think there is a need
to describe it in DT.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds