linux-kernel - [PATCH v1 1/2] dt-bindings: arm: Add Qualcomm extended CTI

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Message-ID: <20240903121847.6964-2-quic_jinlmao@quicinc.com>
Date: Tue, 3 Sep 2024 05:18:43 -0700
From: Mao Jinlong <quic_jinlmao@...cinc.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach
	<mike.leach@...aro.org>, James Clark <james.clark@....com>,
        "Alexander
 Shishkin" <alexander.shishkin@...ux.intel.com>,
        Andy Gross
	<agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Rob Herring
	<robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>
CC: Mao Jinlong <quic_jinlmao@...cinc.com>, <linux-kernel@...r.kernel.org>,
        <coresight@...ts.linaro.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: [PATCH v1 1/2] dt-bindings: arm: Add Qualcomm extended CTI

Add Qualcomm extended CTI support in CTI binding file. Qualcomm
extended CTI supports up to 128 triggers.

Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
---
 .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
index 6a73eaa66a42..141efba7c697 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
@@ -87,6 +87,10 @@ properties:
           - const: arm,coresight-cti-v8-arch
           - const: arm,coresight-cti
           - const: arm,primecell
+      - items:
+          - const: qcom,coresight-cti-extended
+          - const: arm,coresight-cti
+          - const: arm,primecell
 
   reg:
     maxItems: 1
@@ -254,6 +258,16 @@ examples:
       clocks = <&soc_smc50mhz>;
       clock-names = "apb_pclk";
     };
+  # minimum extended CTI definition.
+  - |
+    cti@...10000 {
+      compatible = "qcom,coresight-cti-extended", "arm,coresight-cti",
+                   "arm,primecell";
+      reg = <0x10010000 0x1000>;
+
+      clocks = <&aoss_qmp>;
+      clock-names = "apb_pclk";
+    };
   #  v8 architecturally defined CTI - CPU + ETM connections generated by the
   #  driver according to the v8 architecture specification.
   - |
-- 
2.41.0