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Message-ID: <e1371121-8f06-4c36-a950-063ae716b47e@microchip.com>
Date: Wed, 4 Sep 2024 15:26:45 +0200
From: Nicolas Ferre <nicolas.ferre@...rochip.com>
To: claudiu beznea <claudiu.beznea@...on.dev>, <linux-clk@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: get, prepare, enable a clock not in DT?
On 04/09/2024 at 09:33, claudiu beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Hi, Alexander,
>
> On 02.09.2024 11:24, Alexander Dahl wrote:
>> Hello Claudiu,
>>
>> Am Sat, Aug 31, 2024 at 06:49:59PM +0300 schrieb claudiu beznea:
>>> Hi, Alexander,
>>>
>>> On 28.08.2024 09:55, Alexander Dahl wrote:
>>>> Hello Claudiu,
>>>>
>>>> Am Fri, Aug 23, 2024 at 05:29:44PM +0300 schrieb claudiu beznea:
>>>>>
>>>>>
>>>>> On 20.08.2024 15:17, Alexander Dahl wrote:
>>>>>> By chance: I don't have a sama7g5 based board at hand for testing.
>>>>>> The datasheet says the same as for sam9x60.
>>>>>> Does the nvmem_microchip_otpc driver actually work without timeout on
>>>>>> sama7g5?
>>>>>
>>>>> Yes! This should be because system bus is clocked from MCK0 (as mentioned
>>>>> in peripheral identifiers table) which is enabled by bootloader.
>>>>
>>>> Not sure I can follow. Citing the SAMA7G5 datasheet section 30.4
>>>> (OTPC Product Dependencies):
>>>>
>>>> "The OTPC is clocked through the Power Management Controller
>>>> (PMC). The user must power on the main RC oscillator and enable
>>>> the peripheral clock of the OTPC prior to reading or writing the
>>>> OTP memory."
>>>
>>> I don't see this in [1]. Only:
>>>
>>> "The OTPC is clocked through the Power Management Controller (PMC), so the
>>> programmer must first to configure the PMC."
>>>
>>> From this I got that it is about the MCK0 listed in table Table 8-11.
>>> Peripheral Identifiers.
>>>
>>> [1]
>>> https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7G5-Series-Data-Sheet-DS60001765A.pdf
>>
>> Well, this seems to be an older version revision A from 03/2022.
>> I have DS60001765B (revision B) from 12/2023 and got this here (note
>> the missing 'A' in the filename):
>>
>> https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7G5-Series-Data-Sheet-DS60001765.pdf
>
> This version clearly express your findings. The unknown now is the
> "peripheral clock" that need to be enabled along with the
> main_rc_oscillator. For that you may want to play around with PMC
> Peripheral Control Register, PMC peripheral clock status register and see
> if OTPC fails to work when disabling the peripheral clock with the OTPC ID
> as there is no information about peripheral clock for OTPC in the
> peripheral identifers table.
>
> Hope this helps.
FYI, I asked internally. I'll keep you posted.
Regards,
Nicolas
>> Linked here:
>>
>> https://www.microchip.com/en-us/product/sama7g54
>>
>> The revision history is not very specific, it only says "Updated Power
>> Management". Errata sheet has nothing interesting on that topic.
>>
>> We both cited what we saw in the datasheets. Revision A has the
>> section you cited, revision B has the section I cited.
>>
>>>> Table from section 8.5 (Peripheral Clocks …) has no check mark at "PMC
>>>> clock control" but indeed lists MCK0 as main system bus clock.
>>>
>>> This is what I was taking about.
>>>
>>>> If it
>>>> works on SAMA7G5 without explicitly enabling main RC oscillator, then
>>>> either that clock is on accidentally, or the datasheet is wrong in the
>>>> OTPC section.
>>>
>>> Might be.
>>
>> I don't have a SAMA7G5 at hand. Someone who has could test if OTPC
>> works with/without MCK0, and with/without main RC osc, all possible
>> combinations would be most helpful: with none of those, with only one,
>> only the other, both.
>>
>> Hope we get this clock stuff sorted out?!
>>
>> Greets
>> Alex
>>
>>>
>>> Thank you,
>>> Claudiu Beznea
>>>
>>>>
>>>> Personally I find the "clocked through PMC" part in the OTPC
>>>> section suspicious, because in the peripheral identifiers table OTPC
>>>> has no "PMC Clock Control" mark.
>>>>
>>>> Not sure what's the difference between SAM9X60 and SAMA7G5 internally,
>>>> though. From a user's POV it's possible one of them requires the
>>>> main RC osc, and the other does not, but currently you can't tell from
>>>> the datasheets.
>>>>
>>>>> Here is a snapshot of reading the NVMEM on a SAMA7G5 with bootconfig and
>>>>> thermal calibration packets:
>>>>> https://www.linux4sam.org/bin/view/Linux4SAM/ThermalFaq
>>>>
>>>> Greets
>>>> Alex
>>>>
>>>
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