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Message-ID: <ea8ccb1e-2344-4c35-8a95-7b3f1fe23e08@quicinc.com>
Date: Wed, 4 Sep 2024 22:51:30 +0530
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
CC: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <vkoul@...nel.org>, <kishon@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <p.zabel@...gutronix.de>,
        <dmitry.baryshkov@...aro.org>, <quic_nsekar@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-phy@...ts.infradead.org>, <robimarko@...il.com>
Subject: Re: [PATCH V2 4/6] PCI: qcom: Add support for IPQ5018



On 8/30/2024 2:08 PM, Manivannan Sadhasivam wrote:
> On Tue, Aug 27, 2024 at 10:27:55AM +0530, Sricharan R wrote:
>> Introduce a new compatible and re-use 2_9_0 ops.
>>
> 
> While adding a new SoC, please add more info about the controller. Like the
> hardware revision (internal/synopsys), max number of lanes supported, max link
> speed, is it a derivative etc...
> 
  ok sure, will add.

Regards,
  Sricharan


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