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Message-ID: <6d722868-271a-485b-a7af-e2449adc83ca@ti.com>
Date: Wed, 4 Sep 2024 15:46:56 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: Jan Kiszka <jan.kiszka@...mens.com>
CC: Nishanth Menon <nm@...com>, Santosh Shilimkar <ssantosh@...nel.org>,
        Vignesh Raghavendra <vigneshr@...com>, Tero Kristo <kristo@...nel.org>,
        Rob
 Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor
 Dooley <conor+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-pci@...r.kernel.org>, Siddharth Vadapalli <s-vadapalli@...com>,
        Bao
 Cheng Su <baocheng.su@...mens.com>,
        Hua Qian Li <huaqian.li@...mens.com>,
        Diogo Ivo <diogo.ivo@...mens.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Bjorn Helgaas
	<bhelgaas@...gle.com>
Subject: Re: [PATCH v4 2/7] dt-bindings: PCI: ti,am65: Extend for use with PVU

On Wed, Sep 04, 2024 at 12:00:11PM +0200, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@...mens.com>
> 
> The PVU on the AM65 SoC is capable of restricting DMA from PCIe devices
> to specific regions of host memory. Add the optional property
> "memory-regions" to point to such regions of memory when PVU is used.
> 
> Since the PVU deals with system physical addresses, utilizing the PVU
> with PCIe devices also requires setting up the VMAP registers to map the
> Requester ID of the PCIe device to the CBA Virtual ID, which in turn is
> mapped to the system physical address. Hence, describe the VMAP
> registers which are optionally unless the PVU shall used for PCIe.

The last line above seems to be accidentally modified when compared to
the one at:
https://lore.kernel.org/r/ada462d5-157a-4e11-ba25-d412a2bb678f@ti.com/
"Hence, describe the VMAP registers which are optionally
configured whenever PVU is used for PCIe."

If you intended to modify it, then the sentence appears distorted.

Regards,
Siddharth.

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