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Message-Id: <1725503468-22105-4-git-send-email-hongxing.zhu@nxp.com>
Date: Thu, 5 Sep 2024 10:31:08 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
abelvesa@...nel.org,
peng.fan@....com,
mturquette@...libre.com,
sboyd@...nel.org,
shawnguo@...nel.org,
s.hauer@...gutronix.de,
festevam@...il.com
Cc: devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org,
imx@...ts.linux.dev,
kernel@...gutronix.de,
Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v2 3/3] clk: imx95-blk-ctl: Add one clock gate for HSIO block
CREF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
enable/disable.
Add compatible string "fsl,imx95-hsio-blk-ctl" to support PCIe REF clock
out gate.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
drivers/clk/imx/clk-imx95-blk-ctl.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c b/drivers/clk/imx/clk-imx95-blk-ctl.c
index 74f595f9e5e3..596dfb2f3b75 100644
--- a/drivers/clk/imx/clk-imx95-blk-ctl.c
+++ b/drivers/clk/imx/clk-imx95-blk-ctl.c
@@ -248,6 +248,25 @@ static const struct imx95_blk_ctl_dev_data dispmix_csr_dev_data = {
.clk_reg_offset = 0,
};
+static const struct imx95_blk_ctl_clk_dev_data hsio_blk_ctl_clk_dev_data[] = {
+ [0] = {
+ .name = "hsio_blk_ctl_clk",
+ .parent_names = (const char *[]){ "hsio_pll", },
+ .num_parents = 1,
+ .reg = 0,
+ .bit_idx = 6,
+ .bit_width = 1,
+ .type = CLK_GATE,
+ .flags = CLK_SET_RATE_PARENT,
+ }
+};
+
+static const struct imx95_blk_ctl_dev_data hsio_blk_ctl_dev_data = {
+ .num_clks = 1,
+ .clk_dev_data = hsio_blk_ctl_clk_dev_data,
+ .clk_reg_offset = 0,
+};
+
static int imx95_bc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -418,6 +437,7 @@ static const struct of_device_id imx95_bc_of_match[] = {
{ .compatible = "nxp,imx95-display-master-csr", },
{ .compatible = "nxp,imx95-lvds-csr", .data = &lvds_csr_dev_data },
{ .compatible = "nxp,imx95-display-csr", .data = &dispmix_csr_dev_data },
+ { .compatible = "nxp,imx95-hsio-blk-ctl", .data = &hsio_blk_ctl_dev_data },
{ .compatible = "nxp,imx95-vpu-csr", .data = &vpublk_dev_data },
{ /* Sentinel */ },
};
--
2.37.1
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