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Message-ID: <20240905-b4-opp-dt-binding-fix-v2-1-1e3d2a06748d@ti.com>
Date: Thu, 5 Sep 2024 10:44:32 +0530
From: Dhruva Gole <d-gole@...com>
To: Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
Stephen
Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
CC: Viresh Kumar <viresh.kumar@...aro.org>,
Vignesh Raghavendra
<vigneshr@...com>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Dhruva Gole <d-gole@...com>
Subject: [PATCH v2] dt-bindings: opp: operating-points-v2-ti-cpu: Describe
opp-supported-hw
It seems like we missed migrating the complete information from the old
DT binding where we had described what the opp-supported-hw is supposed
to describe. Hence, bring back the description from the previous binding
to the current one along with a bit more context on what the values are
supposed to be.
Fixes: e576a9a8603f ("dt-bindings: cpufreq: Convert ti-cpufreq to json schema")
Signed-off-by: Dhruva Gole <d-gole@...com>
---
Changes in v2:
- Drop the patch where I updated Maintainers since it's already picked
by Viresh.
- Add more details of how to populate the property based on device
documents like TRM/ datasheet.
- Link to v1: https://lore.kernel.org/r/20240903-b4-opp-dt-binding-fix-v1-0-f7e186456d9f@ti.com
---
.../bindings/opp/operating-points-v2-ti-cpu.yaml | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
index 02d1d2c17129..fd260b20c59c 100644
--- a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
+++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
@@ -45,7 +45,21 @@ patternProperties:
clock-latency-ns: true
opp-hz: true
opp-microvolt: true
- opp-supported-hw: true
+ opp-supported-hw:
+ description: |
+ Two bitfields indicating:
+ 1. Which revision of the SoC the OPP is supported by.
+ This can be easily obtained from the datasheet of the
+ part being ordered/used. For eg. it will be 0x01 for SR1.0
+ 2. Which eFuse bits indicate this OPP is available.
+ The device datasheet has a table talking about Device Speed Grades.
+ If one were to sort this table and only retain the unique elements
+ of the MAXIMUM OPERATING FREQUENCY starting from the first row
+ which tells the lowest OPP, to the highest. The corresponding bits
+ need to be set based on N elements of speed grade the device supports.
+ So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY
+ in the table, then BIT(0), (1) and (2) will be set, which means
+ the value shall be 0x7.
opp-suspend: true
turbo-mode: true
---
base-commit: ecc768a84f0b8e631986f9ade3118fa37852fef0
change-id: 20240903-b4-opp-dt-binding-fix-73c6829751d2
Best regards,
--
Dhruva Gole <d-gole@...com>
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