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Message-ID: <172552808875.2215.5444492199463668370.tip-bot2@tip-bot2>
Date: Thu, 05 Sep 2024 09:21:28 -0000
From: "tip-bot2 for Daniel Sneddon" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: "Shanavas.K.S" <shanavasks@...il.com>,
Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
"Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/bugs] x86/bugs: Add missing NO_SSB flag
The following commit has been merged into the x86/bugs branch of tip:
Commit-ID: 23e12b54acf621f4f03381dca91cc5f1334f21fd
Gitweb: https://git.kernel.org/tip/23e12b54acf621f4f03381dca91cc5f1334f21fd
Author: Daniel Sneddon <daniel.sneddon@...ux.intel.com>
AuthorDate: Thu, 29 Aug 2024 12:24:37 -07:00
Committer: Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Thu, 05 Sep 2024 10:29:31 +02:00
x86/bugs: Add missing NO_SSB flag
The Moorefield and Lightning Mountain Atom processors are
missing the NO_SSB flag in the vulnerabilities whitelist.
This will cause unaffected parts to incorrectly be reported
as vulnerable. Add the missing flag.
These parts are currently out of service and were verified
internally with archived documentation that they need the
NO_SSB flag.
Closes: https://lore.kernel.org/lkml/CAEJ9NQdhh+4GxrtG1DuYgqYhvc0hi-sKZh-2niukJ-MyFLntAA@mail.gmail.com/
Reported-by: Shanavas.K.S <shanavasks@...il.com>
Signed-off-by: Daniel Sneddon <daniel.sneddon@...ux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/r/20240829192437.4074196-1-daniel.sneddon@linux.intel.com
---
arch/x86/kernel/cpu/common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d4e539d..be307c9 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1165,8 +1165,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
VULNWL_INTEL(INTEL_CORE_YONAH, NO_SSB),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID, NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | MSBDS_ONLY),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP, NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
VULNWL_INTEL(INTEL_ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
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