lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZtmP5VixBvXF9THk@smile.fi.intel.com>
Date: Thu, 5 Sep 2024 14:03:01 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: kimriver liu <kimriver.liu@...ngine.com>
Cc: jarkko.nikula@...ux.intel.com, mika.westerberg@...ux.intel.com,
	jsd@...ihalf.com, andi.shyti@...nel.org, linux-i2c@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] i2c: designware: fix master is holding SCL low while
 ENABLE bit is disabled

On Thu, Sep 05, 2024 at 03:42:11PM +0800, kimriver liu wrote:
> From: "kimriver.liu" <kimriver.liu@...ngine.com>

You forgot bumping patch version in the Subject and now it's quite confusing.

> Failure in normal Stop operational path

Is this a subsection?
Make it more clear, by using additional formatting, like

Failure in normal Stop operational path
---------------------------------------

> This failure happens rarely and is hard to reproduce. Debug trace
> showed that IC_STATUS had value of 0x23 when STOP_DET occurred,
> immediately disable ENABLE bit that can result in
> IC_RAW_INTR_STAT.MASTER_ON_HOLD holding SCL low.

> Failure in ENABLE bit is disabled path

Ditto.

> It was observed that master is holding SCL low and the IC_ENABLE is
> already disabled, Enable ABORT bit and ENABLE bit simultaneously
> cannot take effect.
> 
> Check if the master is holding SCL low after ENABLE bit is already
> disabled. If SCL is held low, The software can set this ABORT bit only
> when ENABLE is already set,otherwise,
> the controller ignores any write to ABORT bit. When the abort is done,
> then proceed with disabling the controller.
> 
> These kernel logs show up whenever an I2C transaction is attempted
> after this failure.
> i2c_designware e95e0000.i2c: timeout in disabling adapter
> i2c_designware e95e0000.i2c: timeout waiting for bus ready
> 
> The patch can be fix the controller cannot be disabled while SCL is
> held low in ENABLE bit is already disabled.
> 
> Signed-off-by: kimriver.liu <kimriver.liu@...ngine.com>
> ---

Here is the place for comments and changelog.
Since it's not the first version of the patch, changelog is a must.

-- 
With Best Regards,
Andy Shevchenko



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ