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Message-ID: <172564901527.2215.12281825362291575862.tip-bot2@tip-bot2>
Date: Fri, 06 Sep 2024 18:56:55 -0000
From: "tip-bot2 for Ankit Agrawal" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Ankit Agrawal <agrawal.ag.ankit@...il.com>,
 Konrad Dybcio <konrad.dybcio@...aro.org>,
 Daniel Lezcano <daniel.lezcano@...aro.org>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: timers/core] clocksource/drivers/qcom: Add missing iounmap() on
 errors in msm_dt_timer_init()

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     ca140a0dc0a18acd4653b56db211fec9b2339986
Gitweb:        https://git.kernel.org/tip/ca140a0dc0a18acd4653b56db211fec9b2339986
Author:        Ankit Agrawal <agrawal.ag.ankit@...il.com>
AuthorDate:    Sat, 13 Jul 2024 15:27:13 +05:30
Committer:     Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Fri, 06 Sep 2024 14:49:21 +02:00

clocksource/drivers/qcom: Add missing iounmap() on errors in msm_dt_timer_init()

Add the missing iounmap() when clock frequency fails to get read by the
of_property_read_u32() call, or if the call to msm_timer_init() fails.

Fixes: 6e3321631ac2 ("ARM: msm: Add DT support to msm_timer")
Signed-off-by: Ankit Agrawal <agrawal.ag.ankit@...il.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Link: https://lore.kernel.org/r/20240713095713.GA430091@bnew-VirtualBox
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
 drivers/clocksource/timer-qcom.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/timer-qcom.c b/drivers/clocksource/timer-qcom.c
index b4afe3a..eac4c95 100644
--- a/drivers/clocksource/timer-qcom.c
+++ b/drivers/clocksource/timer-qcom.c
@@ -233,6 +233,7 @@ static int __init msm_dt_timer_init(struct device_node *np)
 	}
 
 	if (of_property_read_u32(np, "clock-frequency", &freq)) {
+		iounmap(cpu0_base);
 		pr_err("Unknown frequency\n");
 		return -EINVAL;
 	}
@@ -243,7 +244,11 @@ static int __init msm_dt_timer_init(struct device_node *np)
 	freq /= 4;
 	writel_relaxed(DGT_CLK_CTL_DIV_4, source_base + DGT_CLK_CTL);
 
-	return msm_timer_init(freq, 32, irq, !!percpu_offset);
+	ret = msm_timer_init(freq, 32, irq, !!percpu_offset);
+	if (ret)
+		iounmap(cpu0_base);
+
+	return ret;
 }
 TIMER_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
 TIMER_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);

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