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Message-ID: <f0efe812-a77b-9a77-c17c-ece503475923@omp.ru>
Date: Fri, 6 Sep 2024 23:29:47 +0300
From: Sergey Shtylyov <s.shtylyov@....ru>
To: Marc Zyngier <maz@...nel.org>, Thomas Gleixner <tglx@...utronix.de>
CC: <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] irqchip/gic: prevent buffer overflow in
 gic_ipi_send_mask()

On 9/5/24 10:47 AM, Marc Zyngier wrote:
[...]

>>> ARM GIC arch v2 spec claims support for just 8 CPU interfaces.  However,
>>> looking at the GIC driver's irq_set_affinity() method, it seems that the
>>> passed CPU mask may contain the logical CPU #s beyond 8, and that method
>>> filters them out before reading gic_cpu_map[], bailing out with
>>> -EINVAL.
>>
>> The reasoning is correct in theory, but in reality it's a non problem.
>>
>> Simply because processors which use this GIC version cannot have more
>> than 8 cores.
>>
>> That means num_possible_cpus() <= 8 so the cpumask handed in cannot have
>> bits >= 8 set. Ergo for_each_cpu() can't return a bit which is >= 8.
> 
> That.

   That? :-)

> The irq_set_affinity() check exists because the affinity can be
> provided by userspace, and used to be be *anything*. Since

   In this case you mean gic_set_affinity(), right?

> 33de0aa4bae98, the affinity that the driver gets is narrowed to what
> is actually *online*.

   What I haven't quite understood from my (cursory) looking at the GICv2
spec (and the GIC driver) is why only one CPU (with a lowest #) is selected
from *mask_val before writing to GICD_GIC_DIST_TARGET, while the spec holds
that an IRQ can be forwarded to any set of 8 CPU interfaces...
 
> So we could actually relax the check in the driver (not that it really
> matters).

   Well, maybe in my copious free time... :-)

> Thanks,
> 
> 	M.

MBR, Sergey

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