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Message-Id: <20240906062701.37088-10-Delphine_CC_Chiu@wiwynn.com>
Date: Fri, 6 Sep 2024 14:26:35 +0800
From: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
To: patrick@...cx.xyz,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org,
linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org
Subject: [PATCH v15 09/32] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555
Enable interrupt setting for pca9555
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 56 +++++++++++++++++--
1 file changed, 52 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index b11951c2f71e..09bbbcb192f5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -832,30 +832,78 @@ power-sensor@12 {
gpio@20 {
compatible = "nxp,pca9555";
- reg = <0x20>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "P48V_OCP_GPIO1","P48V_OCP_GPIO2",
+ "P48V_OCP_GPIO3","FAN_BOARD_0_REVISION_0_R",
+ "FAN_BOARD_0_REVISION_1_R","FAN_BOARD_1_REVISION_0_R",
+ "FAN_BOARD_1_REVISION_1_R","RST_MUX_R_N",
+ "RST_LED_CONTROL_FAN_BOARD_0_N","RST_LED_CONTROL_FAN_BOARD_1_N",
+ "RST_IOEXP_FAN_BOARD_0_N","RST_IOEXP_FAN_BOARD_1_N",
+ "PWRGD_LOAD_SWITCH_FAN_BOARD_0_R","PWRGD_LOAD_SWITCH_FAN_BOARD_1_R",
+ "","";
};
gpio@21 {
compatible = "nxp,pca9555";
- reg = <0x21>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x21>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC_OCP_SLOT_ODD_GPIO1","HSC_OCP_SLOT_ODD_GPIO2",
+ "HSC_OCP_SLOT_ODD_GPIO3","HSC_OCP_SLOT_EVEN_GPIO1",
+ "HSC_OCP_SLOT_EVEN_GPIO2","HSC_OCP_SLOT_EVEN_GPIO3",
+ "ADC_TYPE_0_R","ADC_TYPE_1_R",
+ "MEDUSA_BOARD_REV_0","MEDUSA_BOARD_REV_1",
+ "MEDUSA_BOARD_REV_2","MEDUSA_BOARD_TYPE",
+ "DELTA_MODULE_TYPE","P12V_HSC_TYPE",
+ "","";
};
gpio@22 {
compatible = "nxp,pca9555";
- reg = <0x22>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "CARD_TYPE_SLOT1","CARD_TYPE_SLOT2",
+ "CARD_TYPE_SLOT3","CARD_TYPE_SLOT4",
+ "CARD_TYPE_SLOT5","CARD_TYPE_SLOT6",
+ "CARD_TYPE_SLOT7","CARD_TYPE_SLOT8",
+ "OC_P48V_HSC_0_N","FLT_P48V_HSC_0_N",
+ "OC_P48V_HSC_1_N","FLT_P48V_HSC_1_N",
+ "EN_P48V_AUX_0","EN_P48V_AUX_1",
+ "PWRGD_P12V_AUX_0","PWRGD_P12V_AUX_1";
};
gpio@23 {
compatible = "nxp,pca9555";
- reg = <0x23>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x23>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC1_ALERT1_R_N","HSC2_ALERT1_R_N",
+ "HSC3_ALERT1_R_N","HSC4_ALERT1_R_N",
+ "HSC5_ALERT1_R_N","HSC6_ALERT1_R_N",
+ "HSC7_ALERT1_R_N","HSC8_ALERT1_R_N",
+ "HSC1_ALERT2_R_N","HSC2_ALERT2_R_N",
+ "HSC3_ALERT2_R_N","HSC4_ALERT2_R_N",
+ "HSC5_ALERT2_R_N","HSC6_ALERT2_R_N",
+ "HSC7_ALERT2_R_N","HSC8_ALERT2_R_N";
};
temperature-sensor@48 {
--
2.25.1
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