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Message-Id: <20240906062701.37088-23-Delphine_CC_Chiu@wiwynn.com> Date: Fri, 6 Sep 2024 14:26:48 +0800 From: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com> To: patrick@...cx.xyz, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...econstruct.com.au> Cc: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>, Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org Subject: [PATCH v15 22/32] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Revise duty cycle SMB11 and SMB16 to high: 40%, low: 60%, to meet 400kHz-i2c clock low time spec (> 1.3 us) from EE request Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com> --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index c2994651e747..c940d23c8a4b 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -761,6 +761,7 @@ eeprom@54 { &i2c10 { status = "okay"; bus-frequency = <400000>; + i2c-clk-high-min-percent = <40>; i2c-mux@74 { compatible = "nxp,pca9544"; i2c-mux-idle-disconnect; @@ -1314,6 +1315,7 @@ &i2c15 { mctp-controller; multi-master; bus-frequency = <400000>; + i2c-clk-high-min-percent = <40>; mctp@10 { compatible = "mctp-i2c-controller"; -- 2.25.1
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