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Message-ID: <CAHCN7xLmZYZcHyPh3gy20vFKP7aTDKvWu+a_mbG6LN2gdEifTA@mail.gmail.com>
Date: Thu, 5 Sep 2024 20:23:51 -0500
From: Adam Ford <aford173@...il.com>
To: Dominique Martinet <dominique.martinet@...ark-techno.com>
Cc: Liu Ying <victor.liu@....com>, Andrzej Hajda <andrzej.hajda@...el.com>, 
	Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>, 
	Laurent Pinchart <Laurent.pinchart@...asonboard.com>, Jonas Karlman <jonas@...boo.se>, 
	Jernej Skrabec <jernej.skrabec@...il.com>, 
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, 
	Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, 
	Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, 
	Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, 
	Lucas Stach <l.stach@...gutronix.de>, Frieder Schrempf <frieder.schrempf@...tron.de>, 
	dri-devel@...ts.freedesktop.org, imx@...ts.linux.dev, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/bridge: imx8mp-hdmi-tx: allow 0.5% margin with
 selected clock

On Wed, Sep 4, 2024 at 3:31 AM Dominique Martinet
<dominique.martinet@...ark-techno.com> wrote:
>
> This allows the hdmi driver to pick e.g. 64.8MHz instead of 65Mhz when we
> cannot output the exact frequency, enabling the imx8mp HDMI output to
> support more modes
>
I went from 19 options on Modetest with my AOC 4K monitor to 31.  Of
those 31, three did not appear to sync, but not all the frequencies in
the LUT sync for me either, so I have no objection to moving forward
with this, but I wonder if we should have a note in there about why we
have a 5% tolerance.

> Signed-off-by: Dominique Martinet <dominique.martinet@...ark-techno.com>

Tested-by:  Adam Ford <aford173@...il.com> #imx8mp-beacon

> ---
> This completes the patch series sent by Adam Ford here:
> https://lkml.kernel.org/r/20240904023310.163371-1-aford173@gmail.com
>
> and makes the cheap screens we recommend work with our imx8mp board
> without further kludging.
>
>
>  drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
> index 13bc570c5473..9431cd5e06c3 100644
> --- a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
> +++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
> @@ -23,6 +23,7 @@ imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
>                        const struct drm_display_mode *mode)
>  {
>         struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data;
> +       long round_rate;
>
>         if (mode->clock < 13500)
>                 return MODE_CLOCK_LOW;
> @@ -30,8 +31,9 @@ imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
>         if (mode->clock > 297000)
>                 return MODE_CLOCK_HIGH;
>
> -       if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) !=
> -           mode->clock * 1000)
> +       round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000);
> +       /* accept 0.5% = 1/200 = 5/1000 tolerance */
> +       if (abs(round_rate - mode->clock * 1000) > mode->clock * 5)
>                 return MODE_CLOCK_RANGE;
>
>         /* We don't support double-clocked and Interlaced modes */
> --
> 2.39.2
>
>

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