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Message-ID: <20240906110113.3154327-4-sai.krishna.potthuri@amd.com>
Date: Fri, 6 Sep 2024 16:31:13 +0530
From: Sai Krishna Potthuri <sai.krishna.potthuri@....com>
To: Linus Walleij <linus.walleij@...aro.org>, Michal Simek
<michal.simek@....com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Jay Buddhabhatti
<jay.buddhabhatti@....com>, Praveen Teja Kundanala
<praveen.teja.kundanala@....com>, Greg Kroah-Hartman
<gregkh@...uxfoundation.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-gpio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<saikrishna12468@...il.com>, <git@....com>, Sai Krishna Potthuri
<sai.krishna.potthuri@....com>
Subject: [PATCH v5 3/3] pinctrl: pinctrl-zynqmp: Add support for Versal platform
Add Pinctrl support for Xilinx Versal platform.
Driver checks for firmware support to retrieve the Pin information, if it
is supported then proceed further otherwise it returns error saying
operation not supported. Latest Xilinx Platform Management Firmware must
be used to make use of the Pinctrl driver for Versal platform.
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@....com>
---
drivers/pinctrl/pinctrl-zynqmp.c | 97 ++++++++++++++++++++++++++++++--
1 file changed, 92 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c
index 3c6d56fdb8c9..2b9f8db49a15 100644
--- a/drivers/pinctrl/pinctrl-zynqmp.c
+++ b/drivers/pinctrl/pinctrl-zynqmp.c
@@ -10,6 +10,7 @@
#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
+#include <linux/bitfield.h>
#include <linux/bitmap.h>
#include <linux/init.h>
#include <linux/module.h>
@@ -44,6 +45,12 @@
#define DRIVE_STRENGTH_8MA 8
#define DRIVE_STRENGTH_12MA 12
+#define VERSAL_LPD_PIN_PREFIX "LPD_MIO"
+#define VERSAL_PMC_PIN_PREFIX "PMC_MIO"
+
+#define VERSAL_PINCTRL_ATTR_NODETYPE_MASK GENMASK(19, 14)
+#define VERSAL_PINCTRL_NODETYPE_LPD_MIO BIT(0)
+
/**
* struct zynqmp_pmux_function - a pinmux function
* @name: Name of the pin mux function
@@ -93,6 +100,8 @@ struct zynqmp_pctrl_group {
};
static struct pinctrl_desc zynqmp_desc;
+static u32 family_code;
+static u32 sub_family_code;
static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
{
@@ -596,8 +605,12 @@ static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
if (!groups[resp[i]].name)
return -ENOMEM;
- for (pin = 0; pin < groups[resp[i]].npins; pin++)
- __set_bit(groups[resp[i]].pins[pin], used_pins);
+ for (pin = 0; pin < groups[resp[i]].npins; pin++) {
+ if (family_code == ZYNQMP_FAMILY_CODE)
+ __set_bit(groups[resp[i]].pins[pin], used_pins);
+ else
+ __set_bit((u8)groups[resp[i]].pins[pin] - 1, used_pins);
+ }
}
}
done:
@@ -873,6 +886,70 @@ static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
return 0;
}
+static int versal_pinctrl_get_attributes(u32 pin_idx, u32 *response)
+{
+ struct zynqmp_pm_query_data qdata = {0};
+ u32 payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ qdata.qid = PM_QID_PINCTRL_GET_ATTRIBUTES;
+ qdata.arg1 = pin_idx;
+
+ ret = zynqmp_pm_query_data(qdata, payload);
+ if (ret)
+ return ret;
+
+ memcpy(response, &payload[1], sizeof(*response));
+
+ return 0;
+}
+
+static int versal_pinctrl_prepare_pin_desc(struct device *dev,
+ const struct pinctrl_pin_desc **zynqmp_pins,
+ unsigned int *npins)
+{
+ u32 lpd_mio_pins = 0, attr, nodetype;
+ struct pinctrl_pin_desc *pins, *pin;
+ int ret, i;
+
+ ret = zynqmp_pm_is_function_supported(PM_QUERY_DATA, PM_QID_PINCTRL_GET_ATTRIBUTES);
+ if (ret)
+ return ret;
+
+ ret = zynqmp_pinctrl_get_num_pins(npins);
+ if (ret)
+ return ret;
+
+ pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL);
+ if (!pins)
+ return -ENOMEM;
+
+ for (i = 0; i < *npins; i++) {
+ ret = versal_pinctrl_get_attributes(i, &attr);
+ if (ret)
+ return ret;
+
+ pin = &pins[i];
+ pin->number = attr;
+ nodetype = FIELD_GET(VERSAL_PINCTRL_ATTR_NODETYPE_MASK, attr);
+ if (nodetype == VERSAL_PINCTRL_NODETYPE_LPD_MIO) {
+ pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
+ VERSAL_LPD_PIN_PREFIX, i);
+ lpd_mio_pins++;
+ } else {
+ pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
+ VERSAL_PMC_PIN_PREFIX, i - lpd_mio_pins);
+ }
+
+ if (!pin->name)
+ return -ENOMEM;
+ }
+
+ *zynqmp_pins = pins;
+
+ return 0;
+}
+
static int zynqmp_pinctrl_probe(struct platform_device *pdev)
{
struct zynqmp_pinctrl *pctrl;
@@ -882,9 +959,18 @@ static int zynqmp_pinctrl_probe(struct platform_device *pdev)
if (!pctrl)
return -ENOMEM;
- ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
- &zynqmp_desc.pins,
- &zynqmp_desc.npins);
+ ret = zynqmp_pm_get_family_info(&family_code, &sub_family_code);
+ if (ret < 0)
+ return ret;
+
+ if (family_code == ZYNQMP_FAMILY_CODE) {
+ ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, &zynqmp_desc.pins,
+ &zynqmp_desc.npins);
+ } else {
+ ret = versal_pinctrl_prepare_pin_desc(&pdev->dev, &zynqmp_desc.pins,
+ &zynqmp_desc.npins);
+ }
+
if (ret) {
dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret);
return ret;
@@ -907,6 +993,7 @@ static int zynqmp_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id zynqmp_pinctrl_of_match[] = {
{ .compatible = "xlnx,zynqmp-pinctrl" },
+ { .compatible = "xlnx,versal-pinctrl" },
{ }
};
MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
--
2.25.1
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