lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <378c9865-270f-4a36-8614-ecff6f0236ce@gmail.com>
Date: Sat, 7 Sep 2024 21:22:31 +0800
From: Nick Chan <towinchenmi@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
 Alim Akhtar <alim.akhtar@...sung.com>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Jiri Slaby <jirislaby@...nel.org>, linux-arm-kernel@...ts.infradead.org,
 linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-serial@...r.kernel.org
Cc: asahi@...ts.linux.dev
Subject: Re: [PATCH 1/2] tty: serial: samsung: Fix A7-A11 serial earlycon
 SError



On 7/9/2024 20:54, Krzysztof Kozlowski wrote:
> On 07/09/2024 13:06, Nick Chan wrote:
>> Apple's earlier SoCs, like A7-A11, requires 32-bit writes for the serial
>> port. Otherwise, a SError happens when writing to UTXH (+0x20). This only
>> manifested in earlycon as reg-io-width in the device tree is consulted
>> for normal serial writes.
>>
>> Change the iotype of the port to UPIO_MEM32, to allow the serial port to
>> function on A7-A11 SoCs. This change does not appear to affect Apple M1 and
>> above.
>>
>> Signed-off-by: Nick Chan <towinchenmi@...il.com>
>> ---
>>  drivers/tty/serial/samsung_tty.c | 6 ++++--
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
>> index c4f2ac9518aa..27b8a50bd3e7 100644
>> --- a/drivers/tty/serial/samsung_tty.c
>> +++ b/drivers/tty/serial/samsung_tty.c
>> @@ -2536,7 +2536,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = {
>>  		.name		= "Apple S5L UART",
>>  		.type		= TYPE_APPLE_S5L,
>>  		.port_type	= PORT_8250,
>> -		.iotype		= UPIO_MEM,
>> +		.iotype		= UPIO_MEM32,
>>  		.fifosize	= 16,
>>  		.rx_fifomask	= S3C2410_UFSTAT_RXMASK,
>>  		.rx_fifoshift	= S3C2410_UFSTAT_RXSHIFT,
>> @@ -2825,8 +2825,10 @@ static int __init apple_s5l_early_console_setup(struct earlycon_device *device,
>>  	/* Close enough to S3C2410 for earlycon... */
>>  	device->port.private_data = &s3c2410_early_console_data;
>>  
>> +	/* ... however, we need to change the port iotype */
>> +	device->port.iotype = UPIO_MEM32;
> 
> If there is going to be resend, then this comment is redundant and can
> be dropped - repeats the code and does not provide any explanation why.
> 
> Which would also make the patch smaller and easier to read. See GS101
> earlycon.
I agree that the comment is quite useless as-is. However, I think it is
worthwhile to mention that A7-A11 expect MMIO32 register accesses here,
as someone looking at this code is likely using one of the newer SoCs,
which does not have this restriction.

> 
> 
> 
> Reviewed-by: Krzysztof Kozlowski <krzk@...nel.org>
> 
> Best regards,
> Krzysztof
> 

Nick Chan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ