Message-ID: <20240907182551.128901-1-sboyd@kernel.org>
Date: Sat,  7 Sep 2024 11:25:48 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Michael Turquette <mturquette@...libre.com>,
	linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [GIT PULL] clk fixes for v6.11-rc6

The following changes since commit 39a3396558fb97e6e7d4c1eb04c2166da31904a9:

  clk: thead: fix dependency on clk_ignore_unused (2024-07-31 14:51:47 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git tags/clk-fixes-for-linus

for you to fetch changes up to 71c03a8cb213d267853e0d9f520c972480960544:

  clk: qcom: gcc-sc8280xp: don't use parking clk_ops for QUPs (2024-09-03 13:01:34 -0700)

----------------------------------------------------------------
A pile of Qualcomm clk driver fixes with two main themes: the alpha PLL
driver and shared RCGs, and one fix for the Starfive JH7110 SoC.

 - The Alpha PLL clk_ops had multiple problems around setting rates.
   There are a handful of patches here that fix masks and skip enabling
   the clk from set_rate() when the PLL is disabled. The PLLs are
   crucial to operation of the system as almost all frequencies in the
   system are derived from them.

 - Parking shared RCGs at a slow always on clk at registration time
   breaks stuff. USB host mode can't handle such a slow frequency and
   the serial console gets all garbled when the UART clk is handed over
   to the kernel. There's a few patches that don't use the shared
   clk_ops for the UART clks and another one to skip parking the USB clk
   at registration time.

 - The Starfive PLL driver used for the CPU was busted causing cpufreq
   to fail because the clk didn't change to a safe parent during
   set_rate(). The fix is to register a notifier and switch to a safe
   parent so the PLL can change rate in a glitch free manner.

----------------------------------------------------------------
Abel Vesa (1):
      clk: qcom: gcc-x1e80100: Fix USB 0 and 1 PHY GDSC pwrsts flags

Bryan O'Donoghue (1):
      clk: qcom: gcc-x1e80100: Don't use parking clk_ops for QUPs

Johan Hovold (1):
      clk: qcom: gcc-sc8280xp: don't use parking clk_ops for QUPs

Neil Armstrong (1):
      clk: qcom: gcc-sm8650: Don't use shared clk_ops for QUPs

Satya Priya Kakitapalli (4):
      clk: qcom: clk-alpha-pll: Fix the pll post div mask
      clk: qcom: clk-alpha-pll: Fix the trion pll postdiv set rate API
      clk: qcom: clk-alpha-pll: Fix zonda set_rate failure when PLL is disabled
      clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL

Stephen Boyd (3):
      Merge tag 'qcom-clk-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-fixes
      clk: qcom: gcc-sm8550: Don't use parking clk_ops for QUPs
      clk: qcom: gcc-sm8550: Don't park the USB RCG at registration time

Xingyu Wu (1):
      clk: starfive: jh7110-sys: Add notifier for PLL0 clock

devi priya (1):
      clk: qcom: ipq9574: Update the alpha PLL type for GPLLs

 drivers/clk/qcom/clk-alpha-pll.c               | 25 ++++++++++--
 drivers/clk/qcom/clk-rcg.h                     |  1 +
 drivers/clk/qcom/clk-rcg2.c                    | 30 ++++++++++++++
 drivers/clk/qcom/gcc-ipq9574.c                 | 12 +++---
 drivers/clk/qcom/gcc-sc8280xp.c                | 48 +++++++++++-----------
 drivers/clk/qcom/gcc-sm8550.c                  | 54 ++++++++++++-------------
 drivers/clk/qcom/gcc-sm8650.c                  | 56 +++++++++++++-------------
 drivers/clk/qcom/gcc-x1e80100.c                | 52 ++++++++++++------------
 drivers/clk/starfive/clk-starfive-jh7110-sys.c | 31 +++++++++++++-
 drivers/clk/starfive/clk-starfive-jh71x0.h     |  2 +
 10 files changed, 196 insertions(+), 115 deletions(-)

-- 
https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/
https://git.kernel.org/pub/scm/linux/kernel/git/sboyd/spmi.git

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