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Message-ID: <alpine.DEB.2.21.2409082138160.60835@angie.orcam.me.uk>
Date: Sun, 8 Sep 2024 21:43:02 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
cc: Masahiro Yamada <masahiroy@...nel.org>,
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Subject: Re: [PATCH v2 3/3] rust: Enable for MIPS
On Thu, 5 Sep 2024, Jiaxun Yang wrote:
> diff --git a/scripts/generate_rust_target.rs b/scripts/generate_rust_target.rs
> index 863720777313..bbdf8a4dd169 100644
> --- a/scripts/generate_rust_target.rs
> +++ b/scripts/generate_rust_target.rs
[...]
> + } else {
> + ts.push("arch", "mips");
> + cfg.get("TARGET_ISA_REV").map(|isa_rev| {
> + let feature = match isa_rev.as_str() {
> + "1" => ",+mips32",
> + "2" => ",+mips32r2",
> + "5" => ",+mips32r5",
> + "6" => ",+mips32r6",
> + _ => ",+mips2",
What's the consequence of using `mips2' rather than `mips1' here? How
about other ISA revisions, e.g. `mips4' (that also applies to the 64BIT
leg)?
Maciej
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