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Message-ID: <202409080945.M1Oqo4Ou-lkp@intel.com>
Date: Sun, 8 Sep 2024 09:24:40 +0800
From: kernel test robot <lkp@...el.com>
To: Frank Rowand <frowand.list@...il.com>
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
Rob Herring <robh@...nel.org>, Stephen Boyd <sboyd@...nel.org>
Subject: arch/mips/include/asm/page.h:189:24: sparse: sparse: cast truncates
bits from constant value (a800000000000000 becomes 0)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: d1f2d51b711a3b7f1ae1b46701c769c1d580fa7f
commit: 7b937cc243e5b1df8780a0aa743ce800df6c68d1 of: Create of_root if no dtb provided by firmware
date: 6 months ago
config: mips-randconfig-r111-20240907 (https://download.01.org/0day-ci/archive/20240908/202409080945.M1Oqo4Ou-lkp@intel.com/config)
compiler: mips64-linux-gcc (GCC) 14.1.0
reproduce: (https://download.01.org/0day-ci/archive/20240908/202409080945.M1Oqo4Ou-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202409080945.M1Oqo4Ou-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
drivers/of/fdt.c: note: in included file (through include/linux/mm_types_task.h, include/linux/mm_types.h, include/linux/mmzone.h, ...):
>> arch/mips/include/asm/page.h:189:24: sparse: sparse: cast truncates bits from constant value (a800000000000000 becomes 0)
vim +189 arch/mips/include/asm/page.h
c6e8b587718c48 include/asm-mips/page.h Ralf Baechle 2005-02-10 167
6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 168 /*
6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 169 * __pa()/__va() should be used only during mem init.
6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 170 */
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 171 static inline unsigned long ___pa(unsigned long x)
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 172 {
a5ff1b34e16c20 arch/mips/include/asm/page.h Masahiro Yamada 2016-08-25 173 if (IS_ENABLED(CONFIG_64BIT)) {
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 174 /*
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 175 * For MIPS64 the virtual address may either be in one of
2f9060b1db4aa2 arch/mips/include/asm/page.h Bjorn Helgaas 2024-01-03 176 * the compatibility segments ckseg0 or ckseg1, or it may
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 177 * be in xkphys.
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 178 */
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 179 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x);
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 180 }
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 181
a5ff1b34e16c20 arch/mips/include/asm/page.h Masahiro Yamada 2016-08-25 182 if (!IS_ENABLED(CONFIG_EVA)) {
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 183 /*
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 184 * We're using the standard MIPS32 legacy memory map, ie.
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 185 * the address x is going to be in kseg0 or kseg1. We can
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 186 * handle either case by masking out the desired bits using
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 187 * CPHYSADDR.
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 188 */
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 @189 return CPHYSADDR(x);
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 190 }
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 191
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 192 /*
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 193 * EVA is in use so the memory map could be anything, making it not
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 194 * safe to just mask out bits.
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 195 */
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 196 return x - PAGE_OFFSET + PHYS_OFFSET;
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 197 }
0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 198 #define __pa(x) ___pa((unsigned long)(x))
6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 199 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
49c426ba445f83 arch/mips/include/asm/page.h David Daney 2013-05-07 200 #include <asm/io.h>
5707bf6bcecd85 arch/mips/include/asm/page.h Ralf Baechle 2010-08-17 201
:::::: The code at line 189 was first introduced by commit
:::::: 0d8d83d0447deb526c3125250eb391b5d76a3472 MIPS: Use CPHYSADDR to implement mips32 __pa
:::::: TO: Paul Burton <paul.burton@...tec.com>
:::::: CC: Ralf Baechle <ralf@...ux-mips.org>
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