[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240909215359.780561-1-tharvey@gateworks.com>
Date: Mon, 9 Sep 2024 14:53:59 -0700
From: Tim Harvey <tharvey@...eworks.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Li Yang <leoyang.li@....com>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org
Cc: Tim Harvey <tharvey@...eworks.com>
Subject: [PATCH] arm64: dts: imx8mp-venice*: enable NPU support
The IMX8MP has a VeriSilicon (Vivante VIP8000) NPU which
is supported by the etnaviv driver. Enable it.
Signed-off-by: Tim Harvey <tharvey@...eworks.com>
---
arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 4 ++++
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
index 6c75a5ecf56b..f0211a96855b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
@@ -393,6 +393,10 @@ &i2c3 {
status = "okay";
};
+&npu {
+ status = "okay";
+};
+
/* off-board header */
&uart1 {
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index 9885948952b4..8a04b66a4afc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -666,6 +666,10 @@ &i2c4 {
status = "okay";
};
+&npu {
+ status = "okay";
+};
+
&pcie_phy {
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
fsl,clkreq-unsupported;
--
2.25.1
Powered by blists - more mailing lists