linux-kernel - Re: [PATCH v8 1/3] dt-bindings: display: mediatek: Add OF graph support for board path

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Message-ID: <01020191dafa43a8-cca2fb3f-7eda-4e39-9ca1-eccb78c566a4-000000@eu-west-1.amazonses.com>
Date: Tue, 10 Sep 2024 08:08:40 +0000
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: CK Hu (胡俊光) <ck.hu@...iatek.com>, 
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>, 
	"sui.jingfeng@...ux.dev" <sui.jingfeng@...ux.dev>, 
	"wenst@...omium.org" <wenst@...omium.org>, 
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, 
	"tzimmermann@...e.de" <tzimmermann@...e.de>, 
	Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>, 
	"mripard@...nel.org" <mripard@...nel.org>, 
	Jitao Shi (石记涛) <jitao.shi@...iatek.com>, 
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	Yu-chang Lee (李禹璋) <Yu-chang.Lee@...iatek.com>, 
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	"amergnat@...libre.com" <amergnat@...libre.com>
Subject: Re: [PATCH v8 1/3] dt-bindings: display: mediatek: Add OF graph
 support for board path

Il 08/08/24 05:45, CK Hu (胡俊光) ha scritto:
> Hi, Angelo:
> 
> On Tue, 2024-06-18 at 12:17 +0200, AngeloGioacchino Del Regno wrote:
>> The display IPs in MediaTek SoCs support being interconnected with
>> different instances of DDP IPs (for example, merge0 or merge1) and/or
>> with different DDP IPs (for example, rdma can be connected with either
>> color, dpi, dsi, merge, etc), forming a full Display Data Path that
>> ends with an actual display.
>>
>> The final display pipeline is effectively board specific, as it does
>> depend on the display that is attached to it, and eventually on the
>> sensors supported by the board (for example, Adaptive Ambient Light
>> would need an Ambient Light Sensor, otherwise it's pointless!), other
>> than the output type.
>>
>> Add support for OF graphs to most of the MediaTek DDP (display) bindings
>> to add flexibility to build custom hardware paths, hence enabling board
>> specific configuration of the display pipeline and allowing to finally
>> migrate away from using hardcoded paths.
>>
>> Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
>> Reviewed-by: Alexandre Mergnat <amergnat@...libre.com>
>> Tested-by: Alexandre Mergnat <amergnat@...libre.com>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> ---
> 
> [snip]
> 
>>   
>> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
>> index 677882348ede..98db47894eeb 100644
>> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
>> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
>> @@ -110,6 +110,28 @@ properties:
>>         include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
>>         function block.
>>   
>> +  ports:
>> +    $ref: /schemas/graph.yaml#/properties/ports
>> +    description:
>> +      Input and output ports can have multiple endpoints, each of those
>> +      connects to either the primary, secondary, etc, display pipeline.
>> +
>> +    properties:
>> +      port@0:
>> +        $ref: /schemas/graph.yaml#/properties/port
>> +        description: ETHDR input, usually from one of the MERGE blocks.
> 
> Sorry, I find one question now.
> I think ETHDR may have multiple input, and ETHDR receive data from all input at the same time.
> Why here has only one input port?
> 
> MERGE -->+-----------------+
>           |                 |
> MERGE -->|                 |
>           |      ETHDR      |
> MERGE -->|                 |
>           |                 |
> MERGE -->+-----------------+
> 

Because ETHDR takes one input (ex. "one image", or "one data stream") port, which
is composed of multiple input endpoints (where each endpoint is a MERGE block) :-)

Cheers,
Angelo

> Regards,
> CK
> 
>> +
>> +      port@1:
>> +        $ref: /schemas/graph.yaml#/properties/port
>> +        description:
>> +          ETHDR output to the input of the next desired component in the
>> +          display pipeline, for example one of the available MERGE blocks,
>> +          or others.
>> +
>> +    required:
>> +      - port@0
>> +      - port@1
>> +
>>   required:
>>     - compatible
>>     - reg
>>