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Message-ID: <36a7a634b001bf23ef41daa1b8d7644c6aab133f.camel@samsung.com>
Date: Tue, 10 Sep 2024 10:59:14 +0900
From: Kwanghoon Son <k.son@...sung.com>
To: Nick Chan <towinchenmi@...il.com>, Krzysztof Kozlowski
<krzk@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>, Greg
Kroah-Hartman <gregkh@...uxfoundation.org>, Jiri Slaby
<jirislaby@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org
Cc: asahi@...ts.linux.dev
Subject: Re: [PATCH v4 3/3] tty: serial: samsung: Fix serial rx on Apple
A7-A9
On Mon, 2024-09-09 at 17:51 +0800, Nick Chan wrote:
>
> On 9/9/2024 17:43, Kwanghoon Son wrote:
> > On Mon, 2024-09-09 at 16:37 +0800, Nick Chan wrote:
> > > Apple's older A7-A9 SoCs seems to use bit 3 in UTRSTAT as RXTO, which is
> > > enabled by bit 11 in UCON.
> > >
> > > Access these bits in addition to the original RXTO and RXTO enable bits,
> > > to allow serial rx to function on A7-A9 SoCs. This change does not
> > > appear to affect the A10 SoC and up.
> > >
> > > Signed-off-by: Nick Chan <towinchenmi@...il.com>
> > >
> >
> > [snip]
> >
> > > diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h
> > > index 1e8686695487..964a4fbf2626 100644
> > > --- a/include/linux/serial_s3c.h
> > > +++ b/include/linux/serial_s3c.h
> > > @@ -246,24 +246,28 @@
> > > S5PV210_UFCON_TXTRIG4 | \
> > > S5PV210_UFCON_RXTRIG4)
> > >
> > > -#define APPLE_S5L_UCON_RXTO_ENA 9
> > > -#define APPLE_S5L_UCON_RXTHRESH_ENA 12
> > > -#define APPLE_S5L_UCON_TXTHRESH_ENA 13
> > > -#define APPLE_S5L_UCON_RXTO_ENA_MSK BIT(APPLE_S5L_UCON_RXTO_ENA)
> > > -#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
> > > -#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
> > > +#define APPLE_S5L_UCON_RXTO_ENA 9
> > > +#define APPLE_S5L_UCON_RXTO_LEGACY_ENA 11
> > > +#define APPLE_S5L_UCON_RXTHRESH_ENA 12
> > > +#define APPLE_S5L_UCON_TXTHRESH_ENA 13
> > > +#define APPLE_S5L_UCON_RXTO_ENA_MSK BIT(APPLE_S5L_UCON_RXTO_ENA)
> > > +#define APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK BIT(APPLE_S5L_UCON_RXTO_LEGACY_ENA)
> > > +#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
> > > +#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
> >
> > Small thing, but other diff is not needed except
> > APPLE_S5L_UCON_RXTO_LEGACY_ENA.
> >
> > Kwang.
> The other diffs are there to keep everything aligned, it looks like a
> jumbled mess here in the email, but in an editor like nano it is all
> aligned, before or after this series.
I know why you did. But still there is way keep aligned and only one
line added.
you just added one more tab to other lines.
If one tab with APPLE_S5L_UCON_RXTO_LEGACY_ENA, then everything will
fine.
I think less changes better when see git show or blame.
Best regards,
Kwang.
>
> >
> > >
> > > #define APPLE_S5L_UCON_DEFAULT (S3C2410_UCON_TXIRQMODE | \
> > > S3C2410_UCON_RXIRQMODE | \
> > > S3C2410_UCON_RXFIFO_TOI)
> > > #define APPLE_S5L_UCON_MASK (APPLE_S5L_UCON_RXTO_ENA_MSK | \
> > > + APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK | \
> > > APPLE_S5L_UCON_RXTHRESH_ENA_MSK | \
> > > APPLE_S5L_UCON_TXTHRESH_ENA_MSK)
> > >
> > > +#define APPLE_S5L_UTRSTAT_RXTO_LEGACY BIT(3)
> > > #define APPLE_S5L_UTRSTAT_RXTHRESH BIT(4)
> > > #define APPLE_S5L_UTRSTAT_TXTHRESH BIT(5)
> > > #define APPLE_S5L_UTRSTAT_RXTO BIT(9)
> > > -#define APPLE_S5L_UTRSTAT_ALL_FLAGS (0x3f0)
> > > +#define APPLE_S5L_UTRSTAT_ALL_FLAGS (0x3f8)
> > >
> > > #ifndef __ASSEMBLY__
> > >
> >
>
> Nick Chan
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