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Message-Id:
<172606863325.959689.12181957139773137657.git-patchwork-notify@kernel.org>
Date: Wed, 11 Sep 2024 15:30:33 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Charlie Jenkins <charlie@...osinc.com>
Cc: linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
palmer@...belt.com, aou@...s.berkeley.edu, alexghiti@...osinc.com,
atishp@...osinc.com, samuel.holland@...ive.com, parri.andrea@...il.com,
palmer@...osinc.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] riscv: Disable preemption while handling
PR_RISCV_CTX_SW_FENCEI_OFF
Hello:
This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@...osinc.com>:
On Tue, 03 Sep 2024 15:52:34 -0700 you wrote:
> The icache will be flushed in switch_to() if force_icache_flush is true,
> or in flush_icache_deferred() if icache_stale_mask is set. Between
> setting force_icache_flush to false and calculating the new
> icache_stale_mask, preemption needs to be disabled. There are two
> reasons for this:
>
> 1. If CPU migration happens between force_icache_flush = false, and the
> icache_stale_mask is set, an icache flush will not be emitted.
> 2. smp_processor_id() is used in set_icache_stale_mask() to mark the
> current CPU as not needing another flush since a flush will have
> happened either by userspace or by the kernel when performing the
> migration. smp_processor_id() is currently called twice with preemption
> enabled which causes a race condition. It allows
> icache_stale_mask to be populated with inconsistent CPU ids.
>
> [...]
Here is the summary with links:
- [v2] riscv: Disable preemption while handling PR_RISCV_CTX_SW_FENCEI_OFF
https://git.kernel.org/riscv/c/7c1e5b9690b0
You are awesome, thank you!
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