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Message-ID: <ynzj54wf54b3ebxambxu73trcxee5xjiwhvs6tok652hhkxiff@wympszncw2gx>
Date: Wed, 11 Sep 2024 12:16:29 +0200
From: Andi Shyti <andi.shyti@...nel.org>
To: Kimriver Liu <kimriver.liu@...ngine.com>
Cc: jarkko.nikula@...ux.intel.com, andriy.shevchenko@...ux.intel.com,
mika.westerberg@...ux.intel.com, jsd@...ihalf.com, linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v9] i2c: designware: fix controller is holding SCL low
while ENABLE bit is disabled
Andy,
On Wed, Sep 11, 2024 at 04:39:45PM GMT, Kimriver Liu wrote:
> It was observed that issuing ABORT bit (IC_ENABLE[1]) will not
> work when IC_ENABLE is already disabled.
>
> Check if ENABLE bit (IC_ENABLE[0]) is disabled when the controller
> is holding SCL low. If ENABLE bit is disabled, the software need
> to enable it before trying to issue ABORT bit. otherwise,
> the controller ignores any write to ABORT bit.
>
> These kernel logs show up whenever an I2C transaction is
> attempted after this failure.
> i2c_designware e95e0000.i2c: timeout waiting for bus ready
> i2c_designware e95e0000.i2c: timeout in disabling adapter
>
> The patch can be fix the controller cannot be disabled while
> SCL is held low in ENABLE bit is already disabled.
>
> Fixes: 2409205acd3c ("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low")
> Signed-off-by: Kimriver Liu <kimriver.liu@...ngine.com>
> Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
> Acked-by: Jarkko Nikula <jarkko.nikula@...ux.intel.com>
if you're happe, I would take this in.
Thanks Kimriver for following up on all the reviews, I really
appreciate your responsivness.
Andi
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