[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ddd3fcd2-48b3-4170-bcaa-2fe66e093f43@redhat.com>
Date: Wed, 11 Sep 2024 15:00:52 +0200
From: David Hildenbrand <david@...hat.com>
To: Dev Jain <dev.jain@....com>, akpm@...ux-foundation.org,
willy@...radead.org, kirill.shutemov@...ux.intel.com
Cc: ryan.roberts@....com, anshuman.khandual@....com, catalin.marinas@....com,
cl@...two.org, vbabka@...e.cz, mhocko@...e.com, apopple@...dia.com,
dave.hansen@...ux.intel.com, will@...nel.org, baohua@...nel.org,
jack@...e.cz, mark.rutland@....com, hughd@...gle.com,
aneesh.kumar@...nel.org, yang@...amperecomputing.com, peterx@...hat.com,
ioworker0@...il.com, jglisse@...gle.com, wangkefeng.wang@...wei.com,
ziy@...dia.com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mm@...ck.org
Subject: Re: [PATCH v3 1/2] mm: Abstract THP allocation
On 11.09.24 14:53, Dev Jain wrote:
>
> On 9/11/24 14:57, David Hildenbrand wrote:
>> On 11.09.24 08:55, Dev Jain wrote:
>>> In preparation for the second patch, abstract away the THP allocation
>>> logic present in the create_huge_pmd() path, which corresponds to the
>>> faulting case when no page is present.
>>>
>>> There should be no functional change as a result of applying
>>> this patch.
>>>
>>
>> [...]
>>
>>> +
>>> +static void map_pmd_thp(struct folio *folio, struct vm_fault *vmf,
>>> + struct vm_area_struct *vma, unsigned long haddr)
>>> +{
>>> + pmd_t entry;
>>> +
>>> + entry = mk_huge_pmd(&folio->page, vma->vm_page_prot);
>>> + entry = maybe_pmd_mkwrite(pmd_mkdirty(entry), vma);
>>> + folio_add_new_anon_rmap(folio, vma, haddr, RMAP_EXCLUSIVE);
>>> + folio_add_lru_vma(folio, vma);
>>> + set_pmd_at(vma->vm_mm, haddr, vmf->pmd, entry);
>>> + update_mmu_cache_pmd(vma, vmf->address, vmf->pmd);
>>
>> It's quite weird to see a mixture of haddr and vmf->address, and
>> likely this mixture is wrong or not not required.
>>
>> Looking at arc's update_mmu_cache_pmd() implementation, I cannot see
>> how passing in the unaligned address would do the right thing. But
>> maybe arc also doesn't trigger that code path ... who knows :)
>
> If I am reading correctly, arch/arc/mm/tlb.c: update_mmu_cache_pmd()
> calls update_mmu_cache_range() which is already expecting an unaligned
> address? But...
So update_mmu_cache_pmd() calls
update_mmu_cache_range(NULL, vma, addr, &pte, HPAGE_PMD_NR);
But update_mmu_cache_range() only aligns it *to page boundary*:
unsigned long vaddr = vaddr_unaligned & PAGE_MASK;
We obtain the correct hugepage-aligned physical address from the PTE
phys_addr_t paddr = pte_val(*ptep) & PAGE_MASK_PHYS;
Then, we look at the offset in our folio
unsigned long offset = offset_in_folio(folio, paddr);
And adjust both vaddr and paddr
paddr -= offset;
vaddr -= offset;
To then use that combination with
__inv_icache_pages(paddr, vaddr, nr);
If I am not wrong, getting a non-hugepage aligned vaddr messes up things
here. But only regarding the icache I think.
--
Cheers,
David / dhildenb
Powered by blists - more mailing lists