[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b5128162-278a-4284-8271-b2b91dc446e1@iscas.ac.cn>
Date: Thu, 12 Sep 2024 17:03:20 +0800
From: Quan Zhou <zhouquan@...as.ac.cn>
To: anup@...infault.org, ajones@...tanamicro.com, atishp@...shpatra.org,
paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu
Cc: linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org
Subject: Re: [PATCH] RISC-V: KVM: Redirect instruction access fault trap to
guest
On 2024/8/29 14:20, zhouquan@...as.ac.cn wrote:
> From: Quan Zhou <zhouquan@...as.ac.cn>
>
> The M-mode redirects an unhandled instruction access
> fault trap back to S-mode when not delegating it to
> VS-mode(hedeleg). However, KVM running in HS-mode
> terminates the VS-mode software when back from M-mode.
>
> The KVM should redirect the trap back to VS-mode, and
> let VS-mode trap handler decide the next step.
>
> Signed-off-by: Quan Zhou <zhouquan@...as.ac.cn>
> ---
> arch/riscv/kvm/vcpu_exit.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
> index fa98e5c024b2..696b62850d0b 100644
> --- a/arch/riscv/kvm/vcpu_exit.c
> +++ b/arch/riscv/kvm/vcpu_exit.c
> @@ -182,6 +182,7 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
> ret = -EFAULT;
> run->exit_reason = KVM_EXIT_UNKNOWN;
> switch (trap->scause) {
> + case EXC_INST_ACCESS:
A gentle ping, the instruction access fault should be redirected to
VS-mode for handling, is my understanding correct?
> case EXC_INST_ILLEGAL:
> case EXC_LOAD_MISALIGNED:
> case EXC_STORE_MISALIGNED:
>
> base-commit: 7c626ce4bae1ac14f60076d00eafe71af30450ba
Powered by blists - more mailing lists