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Message-Id: <1726106381-1138-4-git-send-email-shengjiu.wang@nxp.com>
Date: Thu, 12 Sep 2024 09:59:41 +0800
From: Shengjiu Wang <shengjiu.wang@....com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
shawnguo@...nel.org,
s.hauer@...gutronix.de,
kernel@...gutronix.de,
festevam@...il.com,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
shengjiu.wang@...il.com
Subject: [PATCH v2 3/3] arm64: dts: imx93-9x9-qsb: Add PDM microphone sound card support
Add PDM micphone sound card support, configure the pinmux.
This sound card supports recording sound from PDM microphone
and convert the PDM format data to PCM data.
Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
---
.../boot/dts/freescale/imx93-9x9-qsb.dts | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
index f44300225656..72a0e0290a84 100644
--- a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
@@ -122,6 +122,20 @@ simple-audio-card,codec {
};
};
+ sound-micfil {
+ compatible = "fsl,imx-audio-card";
+ model = "micfil-audio";
+
+ pri-dai-link {
+ link-name = "micfil hifi";
+ format = "i2s";
+
+ cpu {
+ sound-dai = <&micfil>;
+ };
+ };
+ };
+
sound-wm8962 {
compatible = "fsl,imx-audio-wm8962";
model = "wm8962-audio";
@@ -271,6 +285,12 @@ exp-sel-hog {
gpios = <22 GPIO_ACTIVE_HIGH>;
output-low;
};
+
+ mic-can-sel-hog {
+ gpio-hog;
+ gpios = <17 GPIO_ACTIVE_HIGH>;
+ output-low;
+ };
};
pmic@25 {
@@ -355,6 +375,15 @@ &lpuart1 { /* console */
status = "okay";
};
+&micfil {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pdm>;
+ assigned-clocks = <&clk IMX93_CLK_PDM>;
+ assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
+ assigned-clock-rates = <49152000>;
+ status = "okay";
+};
+
&mu1 {
status = "okay";
};
@@ -468,6 +497,14 @@ MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
>;
};
+ pinctrl_pdm: pdmgrp {
+ fsl,pins = <
+ MX93_PAD_PDM_CLK__PDM_CLK 0x31e
+ MX93_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM00 0x31e
+ MX93_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM01 0x31e
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
--
2.34.1
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