linux-kernel - [PATCH v2 2/5] dt-bindings: PCI: qcom: Add OPP table for X1E80100

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Message-Id: <20240913083724.1217691-3-quic_qianyu@quicinc.com>
Date: Fri, 13 Sep 2024 01:37:21 -0700
From: Qiang Yu <quic_qianyu@...cinc.com>
To: manivannan.sadhasivam@...aro.org, vkoul@...nel.org, kishon@...nel.org,
        robh@...nel.org, andersson@...nel.org, konradybcio@...nel.org,
        krzk+dt@...nel.org, conor+dt@...nel.org, mturquette@...libre.com,
        sboyd@...nel.org, abel.vesa@...aro.org, quic_msarkar@...cinc.com,
        quic_devipriy@...cinc.com
Cc: dmitry.baryshkov@...aro.org, kw@...ux.com, lpieralisi@...nel.org,
        neil.armstrong@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, Qiang Yu <quic_qianyu@...cinc.com>
Subject: [PATCH v2 2/5] dt-bindings: PCI: qcom: Add OPP table for X1E80100

Add OPP table so that PCIe is able to adjust power domain performance
state and ICC peak bw according to PCIe gen speed and link width.

Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
---
 Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
index a9db0a231563..e2d6719ca54d 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
@@ -70,6 +70,10 @@ properties:
       - const: pci # PCIe core reset
       - const: link_down # PCIe link down reset
 
+  operating-points-v2: true
+  opp-table:
+    type: object
+
 allOf:
   - $ref: qcom,pcie-common.yaml#
 
-- 
2.34.1