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Message-ID: <4766d230-c9c3-414d-a954-3b0c890e7e08@collabora.com>
Date: Sat, 14 Sep 2024 21:28:59 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Heiko Stübner <heiko@...ech.de>,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
Sandy Huang <hjc@...k-chips.com>, Andy Yan <andy.yan@...k-chips.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Mark Yao <markyao0591@...il.com>,
Sascha Hauer <s.hauer@...gutronix.de>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
devicetree@...r.kernel.org, kernel@...labora.com,
Alexandre ARNOUD <aarnoud@...com>, Luis de Arquer <ldearquer@...il.com>,
Algea Cao <algea.cao@...k-chips.com>
Subject: Re: [PATCH v6 3/3] drm/rockchip: Add basic RK3588 HDMI output support
On 9/10/24 10:08 PM, Heiko Stübner wrote:
> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
>> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
>> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
>> Samsung IP block.
>>
>> Add just the basic support for now, i.e. RGB output up to 4K@...z,
>> without audio, CEC or any of the HDMI 2.1 specific features.
>>
>> Co-developed-by: Algea Cao <algea.cao@...k-chips.com>
>> Signed-off-by: Algea Cao <algea.cao@...k-chips.com>
>> Tested-by: Heiko Stuebner <heiko@...ech.de>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
>
> [...]
>
>> diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile
>> index 3ff7b21c0414..3eab662a5a1d 100644
>> --- a/drivers/gpu/drm/rockchip/Makefile
>> +++ b/drivers/gpu/drm/rockchip/Makefile
>> @@ -11,6 +11,7 @@ rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o
>
>> +static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
>> + void *data)
>> +{
>> + static const char * const clk_names[] = {
>> + "pclk", "earc", "aud", "hdp", "hclk_vo1",
>> + "ref" /* keep "ref" last */
>> + };
>
> [...]
>
>> + for (i = 0; i < ARRAY_SIZE(clk_names); i++) {
>> + clk = devm_clk_get_enabled(hdmi->dev, clk_names[i]);
>> +
>> + if (IS_ERR(clk)) {
>> + ret = PTR_ERR(clk);
>> + if (ret != -EPROBE_DEFER)
>> + drm_err(hdmi, "Failed to get %s clock: %d\n",
>> + clk_names[i], ret);
>> + return ret;
>> + }
>> + }
>> + hdmi->ref_clk = clk;
>
> How about using devm_clk_bulk_get_all_enable() for everything except the
> refclk and a separate call to devm_clk_get_enabled() for that refclk .
This helper seems to be partially broken as it doesn't return the number of
clocks stored in the clk_bulk_data table referenced by the clks argument,
meaning it's not possible to iterate these clocks. I provided a new helper
[1] as a possible fix.
If that gets accepted, we could rewrite this as:
ret = devm_clk_bulk_get_all_enabled(hdmi->dev, &clks);
if (ret < 0) {
drm_err(hdmi, "Failed to get clocks: %d\n", ret);
return ret;
}
for (i = 0; i < ret; i++) {
if (!strcmp(clks[i].id, "ref")) {
hdmi->ref_clk = clks[1].clk;
break;
}
}
if (!hdmi->ref_clk) {
drm_err(hdmi, "Missing ref clock\n");
return -EINVAL;
}
> That hdmi->ref_clk just accidentially falls out of that loop at the end
> looks somewhat strange, so getting and keeping that refclk
> separately would make this look cleaner.
I've added /* keep "ref" last */ comment above, but I agree it's not really
the best approach.
I'm going to submit v7 in the meantime, as this was the last remaining open
topic on my list. I guess we can figure this out afterwards.
Thanks,
Cristian
[1] https://lore.kernel.org/lkml/20240914-clk_bulk_ena_fix-v1-0-ce3537585c06@collabora.com/
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