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Message-ID: <66e511eff0c0d_ae212945a@dwillia2-mobl3.amr.corp.intel.com.notmuch>
Date: Fri, 13 Sep 2024 21:32:48 -0700
From: Dan Williams <dan.j.williams@...el.com>
To: Gregory Price <gourry@...rry.net>, <linux-cxl@...r.kernel.org>
CC: <linux-kernel@...r.kernel.org>, <dave@...olabs.net>,
	<jonathan.cameron@...wei.com>, <dave.jiang@...el.com>,
	<alison.schofield@...el.com>, <vishal.l.verma@...el.com>,
	<ira.weiny@...el.com>, <dan.j.williams@...el.com>, <rrichter@....com>,
	<terry.bowman@....com>
Subject: Re: [PATCH] cxl/core/port: defer probe when memdev fails to find
 correct port

Gregory Price wrote:
> Depending on device/hierarchy readiness, it can be possible for the
> async probe process to attempt to register an endpoint before the
> entire port hierarchy is ready.  This currently fails with -ENXIO.
> 
> Return -EPROBE_DEFER to try again later automatically (which is
> what the local comments already say we should do anyway).

I want to make sure this is not papering over some other issue. Can you
post the final topology when this works (cxl list -BPET)? My working
theory is that you have 2 devices that share an intermediate port.
Otherwise, I am having a hard time understanding why the
cxl_bus_rescan() in cxl_acpi_probe() does not obviate the explicit
EPROBE_DEFER.

So, devA is dependendent on devB to create a common port, but devA loses
that race after cxl_bus_rescan() has already run. Then EBPROBE_DEFER is
the right answer to trigger devA to try again.

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