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Message-ID: <20240916091627.7517d5b1@canb.auug.org.au>
Date: Mon, 16 Sep 2024 09:16:27 +1000
From: Stephen Rothwell <sfr@...b.auug.org.au>
To: Michael Ellerman <mpe@...erman.id.au>
Cc: Mina Almasry <almasrymina@...gle.com>, netdev@...r.kernel.org,
 linux-kernel@...r.kernel.org, Jesper Dangaard Brouer <hawk@...nel.org>,
 Ilias Apalodimas <ilias.apalodimas@...aro.org>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
 <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Simon Horman
 <horms@...nel.org>, Linux Next Mailing List <linux-next@...r.kernel.org>,
 Arnd Bergmann <arnd@...db.de>, <linuxppc-dev@...ts.ozlabs.org>, Matthew
 Wilcox <willy@...radead.org>
Subject: Re: [PATCH net-next v2] page_pool: fix build on powerpc with GCC 14

Hi all,

On Sat, 14 Sep 2024 12:02:09 +1000 Michael Ellerman <mpe@...erman.id.au> wrote:
>
> Mina Almasry <almasrymina@...gle.com> writes:
> > Building net-next with powerpc with GCC 14 compiler results in this
> > build error:
> >
> > /home/sfr/next/tmp/ccuSzwiR.s: Assembler messages:
> > /home/sfr/next/tmp/ccuSzwiR.s:2579: Error: operand out of domain (39 is
> > not a multiple of 4)
> > make[5]: *** [/home/sfr/next/next/scripts/Makefile.build:229:
> > net/core/page_pool.o] Error 1
> >
> > Root caused in this thread:
> > https://lore.kernel.org/netdev/913e2fbd-d318-4c9b-aed2-4d333a1d5cf0@cs-soprasteria.com/  
> 
> Sorry I'm late to this, the original report wasn't Cc'ed to linuxppc-dev :D

Yeah, sorry about that.

> I think this is a bug in the arch/powerpc inline asm constraints.
> 
> Can you try the patch below, it fixes the build error for me.
> 
> I'll run it through some boot tests and turn it into a proper patch over
> the weekend.
> 
> cheers
> 
> 
> diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
> index 5bf6a4d49268..0e41c1da82dd 100644
> --- a/arch/powerpc/include/asm/atomic.h
> +++ b/arch/powerpc/include/asm/atomic.h
> @@ -23,6 +23,12 @@
>  #define __atomic_release_fence()					\
>  	__asm__ __volatile__(PPC_RELEASE_BARRIER "" : : : "memory")
>  
> +#ifdef CONFIG_CC_IS_CLANG
> +#define DS_FORM_CONSTRAINT "Z<>"
> +#else
> +#define DS_FORM_CONSTRAINT "YZ<>"
> +#endif
> +
>  static __inline__ int arch_atomic_read(const atomic_t *v)
>  {
>  	int t;
> @@ -197,7 +203,7 @@ static __inline__ s64 arch_atomic64_read(const atomic64_t *v)
>  	if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED))
>  		__asm__ __volatile__("ld %0,0(%1)" : "=r"(t) : "b"(&v->counter));
>  	else
> -		__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
> +		__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : DS_FORM_CONSTRAINT (v->counter));
>  
>  	return t;
>  }
> @@ -208,7 +214,7 @@ static __inline__ void arch_atomic64_set(atomic64_t *v, s64 i)
>  	if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED))
>  		__asm__ __volatile__("std %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter));
>  	else
> -		__asm__ __volatile__("std%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
> +		__asm__ __volatile__("std%U0%X0 %1,%0" : "=" DS_FORM_CONSTRAINT (v->counter) : "r"(i));
>  }
>  
>  #define ATOMIC64_OP(op, asm_op)						\

I have applied this by hand to my fixes branch for today and will
remove it when it (or something better) is applied somewhere appropriate.

-- 
Cheers,
Stephen Rothwell

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