[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZuhJJ5BEgu9q6vaj@lizhi-Precision-Tower-5810>
Date: Mon, 16 Sep 2024 11:05:11 -0400
From: Frank Li <Frank.li@....com>
To: Csókás, Bence <csokas.bence@...lan.hu>
Cc: imx@...ts.linux.dev, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, Wei Fang <wei.fang@....com>,
Shenwei Wang <shenwei.wang@....com>,
Clark Wang <xiaoning.wang@....com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Richard Cochran <richardcochran@...il.com>
Subject: Re: [PATCH 2/2] net: fec: Reload PTP registers after link-state
change
On Mon, Sep 16, 2024 at 04:19:31PM +0200, Csókás, Bence wrote:
> On link-state change, the controller gets reset,
> which clears all PTP registers, including PHC time,
> calibrated clock correction values etc. For correct
> IEEE 1588 operation we need to restore these after
> the reset.
I am not sure if it necessary. timer will be big offset after reset. ptpd
should set_time then do clock frequency adjust, supposed just few ms, ptp
time will get resync.
of course, restore these value may reduce the resync time.
Frank
>
> Signed-off-by: Csókás, Bence <csokas.bence@...lan.hu>
> ---
> drivers/net/ethernet/freescale/fec.h | 7 +++++
> drivers/net/ethernet/freescale/fec_main.c | 4 +++
> drivers/net/ethernet/freescale/fec_ptp.c | 35 +++++++++++++++++++++++
> 3 files changed, 46 insertions(+)
>
> diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h
> index afa0bfb974e6..efe770fe337d 100644
> --- a/drivers/net/ethernet/freescale/fec.h
> +++ b/drivers/net/ethernet/freescale/fec.h
> @@ -691,11 +691,18 @@ struct fec_enet_private {
> /* XDP BPF Program */
> struct bpf_prog *xdp_prog;
>
> + struct {
> + u64 ns_sys, ns_phc;
> + u32 at_corr;
> + u8 at_inc_corr;
> + } ptp_saved_state;
> +
> u64 ethtool_stats[];
> };
>
> void fec_ptp_init(struct platform_device *pdev, int irq_idx);
> void fec_ptp_restore_state(struct fec_enet_private *fep);
> +void fec_ptp_save_state(struct fec_enet_private *fep);
> void fec_ptp_stop(struct platform_device *pdev);
> void fec_ptp_start_cyclecounter(struct net_device *ndev);
> int fec_ptp_set(struct net_device *ndev, struct kernel_hwtstamp_config *config,
> diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
> index 531b51091e7d..570f8a14d975 100644
> --- a/drivers/net/ethernet/freescale/fec_main.c
> +++ b/drivers/net/ethernet/freescale/fec_main.c
> @@ -1077,6 +1077,8 @@ fec_restart(struct net_device *ndev)
> u32 rcntl = OPT_FRAME_SIZE | 0x04;
> u32 ecntl = FEC_ECR_ETHEREN;
>
> + fec_ptp_save_state(fep);
> +
> /* Whack a reset. We should wait for this.
> * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
> * instead of reset MAC itself.
> @@ -1338,6 +1340,8 @@ fec_stop(struct net_device *ndev)
> netdev_err(ndev, "Graceful transmit stop did not complete!\n");
> }
>
> + fec_ptp_save_state(fep);
> +
> /* Whack a reset. We should wait for this.
> * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
> * instead of reset MAC itself.
> diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c
> index c5b89352373a..8011a6f3c4be 100644
> --- a/drivers/net/ethernet/freescale/fec_ptp.c
> +++ b/drivers/net/ethernet/freescale/fec_ptp.c
> @@ -770,9 +770,44 @@ void fec_ptp_init(struct platform_device *pdev, int irq_idx)
> schedule_delayed_work(&fep->time_keep, HZ);
> }
>
> +void fec_ptp_save_state(struct fec_enet_private *fep)
> +{
> + unsigned long flags;
> + u32 atime_inc_corr;
> +
> + spin_lock_irqsave(&fep->tmreg_lock, flags);
> +
> + fep->ptp_saved_state.ns_phc = timecounter_read(&fep->tc);
> + fep->ptp_saved_state.ns_sys = ktime_get_ns();
> +
> + fep->ptp_saved_state.at_corr = readl(fep->hwp + FEC_ATIME_CORR);
> + atime_inc_corr = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_CORR_MASK;
> + fep->ptp_saved_state.at_inc_corr = (u8)(atime_inc_corr >> FEC_T_INC_CORR_OFFSET);
> +
> + spin_unlock_irqrestore(&fep->tmreg_lock, flags);
> +}
> +
> /* Restore PTP functionality after a reset */
> void fec_ptp_restore_state(struct fec_enet_private *fep)
> {
> + u32 atime_inc = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK;
> + unsigned long flags;
> + u32 counter;
> + u64 ns;
> +
> + spin_lock_irqsave(&fep->tmreg_lock, flags);
> +
> + writel(fep->ptp_saved_state.at_corr, fep->hwp + FEC_ATIME_CORR);
> + atime_inc |= ((u32)fep->ptp_saved_state.at_inc_corr) << FEC_T_INC_CORR_OFFSET;
> + writel(atime_inc, fep->hwp + FEC_ATIME_INC);
> +
> + ns = ktime_get_ns() - fep->ptp_saved_state.ns_sys + fep->ptp_saved_state.ns_phc;
> + counter = ns & fep->cc.mask;
> + writel(counter, fep->hwp + FEC_ATIME);
> + timecounter_init(&fep->tc, &fep->cc, ns);
> +
> + spin_unlock_irqrestore(&fep->tmreg_lock, flags);
> +
> /* Restart PPS if needed */
> if (fep->pps_enable) {
> /* Reset turned it off, so adjust our status flag */
> --
> 2.34.1
>
>
Powered by blists - more mailing lists