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Message-ID: <20240916163124.2223468-1-thippesw@amd.com>
Date: Mon, 16 Sep 2024 22:01:22 +0530
From: Thippeswamy Havalige <thippesw@....com>
To: <manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
<linux-pci@...r.kernel.org>, <bhelgaas@...gle.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <devicetree@...r.kernel.org>
CC: <bharat.kumar.gogada@....com>, <michal.simek@....com>,
<lpieralisi@...nel.org>, <kw@...ux.com>, Thippeswamy Havalige
<thippesw@....com>
Subject: [PATCH v2 0/2] Add support for CPM5 controller 1
This patch series introduces support for the second Root Port controller in
the Xilinx Versal Premium CPM5 block. The Versal Premium platform features
two Type-A Root Port controllers operating at Gen5 speed. However, the
error interrupt registers and their corresponding bits are located at
different offsets for Controller 0 and Controller 1.
To handle these differences, the series includes:
A new compatible string for the second Root Port controller in the device
tree bindings.
Driver updates to manage platform-specific interrupt registers and offsets
for both controllers using the new compatible string.
Thippeswamy Havalige (2):
dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
PCI: xilinx-cpm: Add support for Versal CPM5 Root Port controller 1
.../bindings/pci/xilinx-versal-cpm.yaml | 1 +
drivers/pci/controller/pcie-xilinx-cpm.c | 45 ++++++++++++++-----
2 files changed, 36 insertions(+), 10 deletions(-)
--
2.34.1
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