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Message-Id: <20240917073117.1531207-3-anshuman.khandual@arm.com>
Date: Tue, 17 Sep 2024 13:01:12 +0530
From: Anshuman Khandual <anshuman.khandual@....com>
To: linux-mm@...ck.org
Cc: Anshuman Khandual <anshuman.khandual@....com>,
Andrew Morton <akpm@...ux-foundation.org>,
David Hildenbrand <david@...hat.com>,
Ryan Roberts <ryan.roberts@....com>,
"Mike Rapoport (IBM)" <rppt@...nel.org>,
Arnd Bergmann <arnd@...db.de>,
x86@...nel.org,
linux-m68k@...ts.linux-m68k.org,
linux-fsdevel@...r.kernel.org,
kasan-dev@...glegroups.com,
linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>
Subject: [PATCH V2 2/7] x86/mm: Drop page table entry address output from pxd_ERROR()
This drops page table entry address output from all pxd_ERROR() definitions
which now matches with other architectures. This also prevents build issues
while transitioning into pxdp_get() based page table entry accesses.
The mentioned build error is caused with changed macros pxd_ERROR() ends up
doing &pxdp_get(pxd) which does not make sense and generates "error: lvalue
required as unary '&' operand" warning.
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: x86@...nel.org
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
---
arch/x86/include/asm/pgtable-3level.h | 12 ++++++------
arch/x86/include/asm/pgtable_64.h | 20 ++++++++++----------
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index dabafba957ea..e1fa4dd87753 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -10,14 +10,14 @@
*/
#define pte_ERROR(e) \
- pr_err("%s:%d: bad pte %p(%08lx%08lx)\n", \
- __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
+ pr_err("%s:%d: bad pte (%08lx%08lx)\n", \
+ __FILE__, __LINE__, (e).pte_high, (e).pte_low)
#define pmd_ERROR(e) \
- pr_err("%s:%d: bad pmd %p(%016Lx)\n", \
- __FILE__, __LINE__, &(e), pmd_val(e))
+ pr_err("%s:%d: bad pmd (%016Lx)\n", \
+ __FILE__, __LINE__, pmd_val(e))
#define pgd_ERROR(e) \
- pr_err("%s:%d: bad pgd %p(%016Lx)\n", \
- __FILE__, __LINE__, &(e), pgd_val(e))
+ pr_err("%s:%d: bad pgd (%016Lx)\n", \
+ __FILE__, __LINE__, pgd_val(e))
#define pxx_xchg64(_pxx, _ptr, _val) ({ \
_pxx##val_t *_p = (_pxx##val_t *)_ptr; \
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 3c4407271d08..4e462c825cab 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -32,24 +32,24 @@ extern void paging_init(void);
static inline void sync_initial_page_table(void) { }
#define pte_ERROR(e) \
- pr_err("%s:%d: bad pte %p(%016lx)\n", \
- __FILE__, __LINE__, &(e), pte_val(e))
+ pr_err("%s:%d: bad pte (%016lx)\n", \
+ __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
- pr_err("%s:%d: bad pmd %p(%016lx)\n", \
- __FILE__, __LINE__, &(e), pmd_val(e))
+ pr_err("%s:%d: bad pmd (%016lx)\n", \
+ __FILE__, __LINE__, pmd_val(e))
#define pud_ERROR(e) \
- pr_err("%s:%d: bad pud %p(%016lx)\n", \
- __FILE__, __LINE__, &(e), pud_val(e))
+ pr_err("%s:%d: bad pud (%016lx)\n", \
+ __FILE__, __LINE__, pud_val(e))
#if CONFIG_PGTABLE_LEVELS >= 5
#define p4d_ERROR(e) \
- pr_err("%s:%d: bad p4d %p(%016lx)\n", \
- __FILE__, __LINE__, &(e), p4d_val(e))
+ pr_err("%s:%d: bad p4d (%016lx)\n", \
+ __FILE__, __LINE__, p4d_val(e))
#endif
#define pgd_ERROR(e) \
- pr_err("%s:%d: bad pgd %p(%016lx)\n", \
- __FILE__, __LINE__, &(e), pgd_val(e))
+ pr_err("%s:%d: bad pgd (%016lx)\n", \
+ __FILE__, __LINE__, pgd_val(e))
struct mm_struct;
--
2.25.1
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