linux-kernel - [tip: sched/rt] riscv: Allow to enable PREEMPT

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Message-ID: <172656454280.2215.11568774932481128926.tip-bot2@tip-bot2>
Date: Tue, 17 Sep 2024 09:15:42 -0000
From: "tip-bot2 for Sebastian Andrzej Siewior" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
 Thomas Gleixner <tglx@...utronix.de>, Nam Cao <namcao@...utronix.de>,
 x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: sched/rt] riscv: Allow to enable PREEMPT_RT.

The following commit has been merged into the sched/rt branch of tip:

Commit-ID:     2638e4e6b18233d7ec54edb953f253ae9515bac2
Gitweb:        https://git.kernel.org/tip/2638e4e6b18233d7ec54edb953f253ae9515bac2
Author:        Sebastian Andrzej Siewior <bigeasy@...utronix.de>
AuthorDate:    Fri, 06 Sep 2024 12:59:06 +02:00
Committer:     Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Tue, 17 Sep 2024 11:06:08 +02:00

riscv: Allow to enable PREEMPT_RT.

It is really time.

riscv has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on riscv.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Tested-by: Nam Cao <namcao@...utronix.de> # Visionfive 2
Link: https://lore.kernel.org/all/20240906111841.562402-4-bigeasy@linutronix.de

---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 86d1f1c..82724bc 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -65,6 +65,7 @@ config RISCV
 	select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
 	select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
 	select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
+	select ARCH_SUPPORTS_RT
 	select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK
 	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
 	select ARCH_USE_MEMTEST