linux-kernel - Re: [PATCH v2 1/2] arm64: dts: s32g: Add S32G2/S32G3 uSDHC pinmux

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <f2660611-6f60-4913-8705-e99956ab23b0@kernel.org>
Date: Tue, 17 Sep 2024 19:44:58 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Ciprian Costea <ciprianmarian.costea@....nxp.com>,
 Chester Lin <chester62515@...il.com>, Matthias Brugger <mbrugger@...e.com>,
 Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
 Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
 Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>,
 linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 NXP S32 Linux Team <s32@....com>, Radu Pirea <radu-nicolae.pirea@....com>
Subject: Re: [PATCH v2 1/2] arm64: dts: s32g: Add S32G2/S32G3 uSDHC pinmux

On 30/08/2024 13:33, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
> 
> Adding 100mhz & 200mhz pinmux support for uSDHC helps to enable
> higher speed modes for SD (SDR50, DDR50, SDR104) and
> eMMC (such as HS200, HS400/HS400ES).
> 
> Signed-off-by: Radu Pirea <radu-nicolae.pirea@....com>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/s32g2.dtsi      | 153 ++++++++++++++++++
>  .../arm64/boot/dts/freescale/s32g274a-evb.dts |   4 +
>  .../boot/dts/freescale/s32g274a-rdb2.dts      |   4 +
>  arch/arm64/boot/dts/freescale/s32g3.dtsi      | 153 ++++++++++++++++++
>  .../boot/dts/freescale/s32g399a-rdb3.dts      |   4 +
>  5 files changed, 318 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index fa054bfe7d5c..7be430b78c83 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -162,6 +162,159 @@ jtag-grp4 {
>  					slew-rate = <166>;
>  				};
>  			};
> +
> +			pinctrl_usdhc0: usdhc0grp-pins {
> +				usdhc0-grp0 {

Are you sure that this passes dtbs_check W=1?

Best regards,
Krzysztof