linux-kernel - Re: [PATCH v3 1/4] dt-bindings: display: bridge: add sam9x75-mipi-dsi binding

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Message-ID: <20240918-concert-liability-fab83f411cfa@squawk>
Date: Wed, 18 Sep 2024 09:04:50 +0100
From: Conor Dooley <conor@...nel.org>
To: Manikandan.M@...rochip.com
Cc: andrzej.hajda@...el.com, neil.armstrong@...aro.org, rfoss@...nel.org,
	Laurent.pinchart@...asonboard.com, jonas@...boo.se,
	jernej.skrabec@...il.com, airlied@...il.com, daniel@...ll.ch,
	maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
	tzimmermann@...e.de, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, linux@...linux.org.uk,
	Nicolas.Ferre@...rochip.com, alexandre.belloni@...tlin.com,
	claudiu.beznea@...on.dev, arnd@...db.de, geert+renesas@...der.be,
	mpe@...erman.id.au, rdunlap@...radead.org, Dharma.B@...rochip.com,
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 1/4] dt-bindings: display: bridge: add
 sam9x75-mipi-dsi binding

On Wed, Sep 18, 2024 at 03:00:45AM +0000, Manikandan.M@...rochip.com wrote:
> On 17/09/24 6:08 pm, Conor Dooley wrote:
> > On Tue, Sep 17, 2024 at 03:16:53AM +0000,Manikandan.M@...rochip.com  wrote:
> >> Hi Conor,
> >>
> >> On 14/08/24 7:29 pm, Conor Dooley wrote:
> >>> On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:

> >>>> +  microchip,sfr:
> >>>> +    $ref: /schemas/types.yaml#/definitions/phandle
> >>>> +    description:
> >>>> +      phandle to Special Function Register (SFR) node.To enable the DSI/CSI
> >>>> +      selection bit in SFR's ISS Configuration Register.
> >>> I'm curious - why is this phandle required? How many SFR nodes are there
> >>> on the platform?
> >> This phandle is to map the memory region of SFR node and configure the
> >> DSI bit in the SFR's ISS configuration register.
> >> currently there is only one SFR node in this platform.
> > What does "currently" mean? The platform either has one or it does not,
> > currently makes it sound like it has more than one but the dts only has
> > one.
> Apologies, I would like to clarify the statement that this platform only 
> has one 32-bit special function register implemented.

In that case, you dont need a phandle at all, just look the sfr up by
its compatible.

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