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Message-ID: <4b546151-d5e1-22a3-a6d5-167a82c5724d@gentwo.org>
Date: Wed, 18 Sep 2024 04:03:44 -0700 (PDT)
From: "Christoph Lameter (Ampere)" <cl@...two.org>
To: Will Deacon <will@...nel.org>
cc: Thomas Gleixner <tglx@...utronix.de>, 
    Catalin Marinas <catalin.marinas@....com>, 
    Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>, 
    Waiman Long <longman@...hat.com>, Boqun Feng <boqun.feng@...il.com>, 
    Linus Torvalds <torvalds@...ux-foundation.org>, linux-mm@...ck.org, 
    linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
    linux-arch@...r.kernel.org
Subject: Re: [PATCH v3] Avoid memory barrier in read_seqcount() through load
 acquire

On Tue, 17 Sep 2024, Will Deacon wrote:

> > +config ARCH_HAS_ACQUIRE_RELEASE
> > +	bool
> > +	help
> > +	  Setting ARCH_HAS_ACQUIRE_RELEASE indicates that the architecture
> > +	  supports load acquire and release. Typically these are more effective
> > +	  than memory barriers. Code will prefer the use of load acquire and
> > +	  store release over memory barriers if this option is enabled.
> > +
>
> Unsurprisingly, I'd be in favour of making this unconditional rather than
> adding a new Kconfig option. Would that actually hurt any architectures
> where we care about the last few shreds of performance?

Other arches do not have acquire / release and will create additional
barriers in the fallback implementation of smp_load_acquire. So it needs
to be an arch config option.

> > +	if (USE_COND_LOAD_ACQUIRE)
> > +		return smp_cond_load_acquire((unsigned int *)&s->sequence, (s->sequence & 1) == 0);
>
> This looks wrong to me.
>
> The conditional expression passed to smp_cond_load_acquire() should be
> written in terms of 'VAL', otherwise you're introducing an additional
> non-atomic access to the sequence counter.

Hmmm... The compiler seems to have optimized that out. Will use VAL in
next rollup.


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