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Message-ID: <89da43fd-69fb-48a6-830e-e157360aeab6@amd.com>
Date: Wed, 18 Sep 2024 13:22:32 -0500
From: "Moger, Babu" <babu.moger@....com>
To: Reinette Chatre <reinette.chatre@...el.com>, corbet@....net,
tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
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Subject: Re: [PATCH 3/7] x86/resctrl: Introduce sdciae_capable in rdt_resource
On 9/18/24 10:27, Moger, Babu wrote:
> Hi Reinette,
>
> On 9/13/24 15:45, Reinette Chatre wrote:
>> Hi Babu,
>>
>> On 8/16/24 9:16 AM, Babu Moger wrote:
>>> Detect SDCIAE`(L3 Smart Data Cache Injection Allocation Enforcement)
>>
>> (stray ` char)
>
> Sure.
>
>>
>>> feature and initialize sdciae_capable.
>>
>> (This is a repeat of the discussion we had surrounding the ABMC feature.)
>>
>> By adding "sdciae_capable" to struct rdt_resource the "sdciae" feature
>> becomes a resctrl fs feature. Any other architecture that has a "similar
>> but perhaps not identical feature to AMD's SDCIAE" will be forced to also
>> call it "sdciae" ... sdciae seems like a marketing name to me and resctrl
>> needs something generic that could later be built on (if needed) by other
>> architectures.
>
> How about "cache_inject_capable" ?
>
> This seems generic. I will change the description also.
>
Basically, this feature reserves specific CLOS for SDCI cache.
We can also name "clos_reserve_capable".
--
Thanks
Babu Moger
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