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Message-ID: <172675621369.1213843.2178006732332922667.b4-ty@sntech.de>
Date: Thu, 19 Sep 2024 16:30:24 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Maxime Ripard <mripard@...nel.org>,
	Sandy Huang <hjc@...k-chips.com>,
	Jonas Karlman <jonas@...boo.se>,
	David Airlie <airlied@...il.com>,
	Simona Vetter <simona@...ll.ch>,
	Andy Yan <andy.yan@...k-chips.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Thomas Zimmermann <tzimmermann@...e.de>
Cc: Heiko Stuebner <heiko@...ech.de>,
	linux-kernel@...r.kernel.org,
	dri-devel@...ts.freedesktop.org,
	linux-rockchip@...ts.infradead.org,
	Diederik de Haas <didi.debian@...ow.org>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 0/7] rockchip: Enable 4K60Hz mode on RK3228, RK3328, RK3399 and RK356x

On Sun, 8 Sep 2024 14:54:57 +0000, Jonas Karlman wrote:
> This prepares and enable use of HDMI2.0 modes, e.g. 4K@...z, on RK3228,
> RK3328, RK3399 and RK356x. Support for 10-bit and/or YUV output modes is
> not part of this series.
> 
> Patch 1 add hdmiphy rate validation in mode_valid so that HDMI2.0 modes
> can be enabled on RK3228 and RK3328.
> 
> [...]

Applied, thanks!

[1/7] drm/rockchip: dw_hdmi: Filter modes based on hdmiphy_clk
      commit: 3303a206ae7474b2f8a5d17d8df9de08bac16ca5
[2/7] drm/rockchip: dw_hdmi: Adjust cklvl & txlvl for RF/EMI
      commit: 6e94e2871eb706a17692acf7ef85ecf2789f6433
[3/7] drm/rockchip: dw_hdmi: Add phy_config for 594Mhz pixel clock
      commit: b60c86d305f46483d3ed0743e9ec97a76addcabc
[4/7] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always
      commit: 7d324630f3515bd6e11cadeb1d748bd74ecc9664
[5/7] drm/rockchip: dw_hdmi: Use auto-generated tables
      commit: 7595c7ef17ffe70d0f4fdda01f87f105a12de66b
[6/7] drm/rockchip: dw_hdmi: Enable 4K@...z mode on RK3399 and RK356x
      commit: 28f0ae48e7fdbd6cdcf3972c8d8686a529ae1ede
[7/7] drm/rockchip: Load crtc devices in preferred order
      commit: 0c4558a1bc2df9b6e6fb311de9cab192b0943426

Best regards,
-- 
Heiko Stuebner <heiko@...ech.de>

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