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Message-Id: <20240919-pcie_ep_range-v1-1-b3e9d62780b7@nxp.com>
Date: Thu, 19 Sep 2024 18:03:01 -0400
From: Frank Li <Frank.Li@....com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>, 
 Krzysztof Wilczyński <kw@...ux.com>, 
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, 
 Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Abraham I <kishon@...nel.org>, 
 Saravana Kannan <saravanak@...gle.com>, Jingoo Han <jingoohan1@...il.com>, 
 Gustavo Pimentel <gustavo.pimentel@...opsys.com>, 
 Jesper Nilsson <jesper.nilsson@...s.com>, 
 Richard Zhu <hongxing.zhu@....com>, Lucas Stach <l.stach@...gutronix.de>, 
 Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, 
 Pengutronix Kernel Team <kernel@...gutronix.de>, 
 Fabio Estevam <festevam@...il.com>
Cc: linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-arm-kernel@...s.com, 
 linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev, 
 Krzysztof Wilczyński <kwilczynski@...nel.org>, 
 Frank Li <Frank.Li@....com>
Subject: [PATCH 1/9] dt-bindings: PCI: pci-ep: Document 'ranges' property

The PCI bus device tree supports 'ranges' properties that indicate how to
convert PCI addresses to CPU addresses. Many PCI controllers are dual-role
controllers, supporting both Root Complex (RC) and Endpoint (EP) modes. The
EP side also needs similar information for proper address translation.

Add 'ranges' property for pcie-ep, which format is same as PCI's ranges.

Signed-off-by: Frank Li <Frank.Li@....com>
---
 Documentation/devicetree/bindings/pci/pci-ep.yaml | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml
index f75000e3093db..2de00d2bf7326 100644
--- a/Documentation/devicetree/bindings/pci/pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml
@@ -17,6 +17,26 @@ properties:
   $nodename:
     pattern: "^pcie-ep@"
 
+  ranges:
+    description:
+      Outbound memory regions, which is extend reg 'addr_space' if pci bus
+      address is not equal cpu address or there are more one outbound
+      memory regions.
+    oneOf:
+      - type: boolean
+      - minItems: 1
+        maxItems: 32    # Should be enough
+        items:
+          minItems: 5
+          maxItems: 8
+          additionalItems: true
+          items:
+            - enum:
+                - 0x42000000
+                - 0x43000000
+                - 0x82000000
+                - 0x83000000
+
   max-functions:
     description: Maximum number of functions that can be configured
     $ref: /schemas/types.yaml#/definitions/uint8
@@ -42,6 +62,16 @@ properties:
     default: 1
     maximum: 16
 
+  device_type:
+    $ref: /schemas/types.yaml#/definitions/string
+    const: pci-ep
+
+  "#address-cells":
+    const: 3
+
+  "#size-cells":
+    const: 2
+
   linux,pci-domain:
     description:
       If present this property assigns a fixed PCI domain number to a PCI

-- 
2.34.1


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